I’m building a C++ project and want to make use of AVX intrinsics. I’m sure my CPU supports them as I have written a test project and compiled it manually with clang -mavx. But I don’t know how to enable it under Meson. I have tried adding c_args : ['-mavx'] and link_args : ['-mavx'] but I still get the following errors from the compiler:
error: AVX vector argument of type '__m256' (vector of 8 'float' values) without 'avx' enabled changes the ABI
error: AVX vector return of type '__m256' (vector of 8 'float' values) without 'avx' enabled changes the ABI
How can I enable the flag -mavx under Meson?
I needed to use cpp_args : ['-mavx']
Related
Recently I met a problem that my avx2 optimized program may crash on old machines like 2010 mac, which does not support avx2 intruction set. At the same time, I can ensure that all my avx2 code is surrounded by dynamically detection of instruction, which will not be run on an avx2-free machine.
So i digged into this problem and found that the crash is caused by auto-vectorization conducted by llvm itself. I tried -fno-vectorize and -fno-slp-vectorize but found that once -mavx2 is set, the program will be auto vectorized.
Is there a way to disable auto-vectorization in llvm with -mavx2 set? Because without -mavx2, my handwritten avx2 code may not be compiled successfully.
An alternative to specifying the -mavx2 flag generally would be to use function attributes specifying avx2 just on the relevant functions.
void __attribute__ ((__target__ ("avx2"))) function_with_avx2(...) {
...
}
void function_without_avx2(...) {
...
}
I am attempting to compile a C++ code using gcc/5.3 on Scientific Linux release 6.7. I keep getting the following errors whenever I run my Makefile though:
/tmp/ccjZqIED.s: Assembler messages:
/tmp/ccjZqIED.s:768: Error: no such instruction: `shlx %rax,%rdx,%rdx'
/tmp/ccjZqIED.s:1067: Error: no such instruction: `shlx %rax,%rdx,%rdx'
/tmp/ccjZqIED.s: Assembler messages:
/tmp/ccjZqIED.s:6229: Error: no such instruction: `mulx %r10,%rcx,%rbx'
/tmp/ccjZqIED.s:6248: Error: no such instruction: `mulx %r13,%rcx,%rbx'
/tmp/ccjZqIED.s:7109: Error: no such instruction: `mulx %r10,%rcx,%rbx'
/tmp/ccjZqIED.s:7128: Error: no such instruction: `mulx %r13,%rcx,%rbx'
I've attmpted to follow the advice from this question with no change to my output:
Compile errors with Assembler messages
My compiler options are currently:
CXXFLAGS = -g -Wall -O0 -pg -std=c++11
Does anyone have any idea what could be causing this?
This means that GCC is outputting an instruction that your assembler doesn't support. Either that's coming from inline asm in the source code, or that shouldn't happen, and suggests that you have compiled GCC on a different machine with a newer assembler, then copied it to another machine where it doesn't work properly.
Assuming those instructions aren't used explicitly in an asm statement you should be able to tell GCC not to emit those instructions with a suitable flag such as -mno-avx (or whatever flag is appropriate to disable use of those particular instructions).
#jonathan-wakely's answer is correct in that the assembler, which your compiler invokes, does not understand the assembly code, which your compiler generates.
As to why that happens, there are multiple possibilities:
You installed the newer compiler by hand without also updating your assembler
Your compiler generates 64-bit instructions, but assembler is limited to 32-bit ones for some reason
Disabling AVX (-mno-avx) is unlikely to help, because it is not explicitly requested either -- there is no -march in the quoted CXXFLAGS. If it did help, then you did not show us all of the compiler flags -- it would've been best, if you simply included the entire compiler command-line.
If my suspicion is correct in 1. above, then you should build and/or install the latest binutils package, which will provide as aware of AVX instructions, among other things. You would then need to rebuild the compiler with the --with-as=/path/to/the/updated/as flag passed to configure.
If your Linux installation is 32-bit only (suspicion 2.), then you should not be generating 64-bit binaries at all. It is possible, but not trivial...
Do post the output of uname -a and your entire compiler command-line leading to the above error-messages.
This question already has an answer here:
Compiling issue with ifort composer_xe_2015.3.187
(1 answer)
Closed 7 years ago.
I am using a numerical model that is sensitive to the precision of numerics. With my old ifort compiler I successfully used the Fortran flags
"fp-model precise"
I recently installed intel compiler composer_xe_2015.3.187. It does not recognize the Fortran flag
"fp-model precise".
This is the exact error that I get
f95: error: precise: No such file or directory
f95: error: unrecognized command line option ‘-fp-model’
I am afraid if I would be sacrificing my efficiency in lieu of the new compiler or is the new one inherently able to maintain precision.
The compiler you are invoking with the name f95 is not Intel Fortran. Based on the error message, I'm guessing it is actually the GNU Fortran compiler, but you can check for sure by running f95 -v to see what the compiler identifies itself as.
Intel Fortran 15 still supports the option -fp-model precise.
Before invoking ifort, you need to setup its environment, e.g.
source /path/to/intel/bin/ifortvars.sh intel64
for the 64 bit compiler. You can then invoke the compiler as ifort.
I just started to experiment with intrinsics. I managed to successfully compile a program using __m128 on a Mac using Clang 5.1. The CPU on this Mac is an Intel core i5 M540.
When I tried to compile the same code with __m256, I get the following message:
simple.cpp:4:2: error: unknown type name '__m256'
__m256 A;
The code looks like this:
#include <immintrin.h>
int main()
{
__m256 A;
return 0;
}
And here is the command used to compile it:
c++ -o simple simple.cpp -march=native -O3
Is it just that my CPU is too old to support AVX instruction set? Are all the options I use (on the command line) correct? I checked in the immintrin.h include file, and it does call another including file which seems to be defining AVX intrinsics. Apologies if the question is naive or if the terminology is misused, as I said, I am new to this topic.
The Intel 540M CPU is in the Westmere microarchitecture (sorry for the mistake in the comment) which appears before Sandy Bridge when AVX was introduced so it doesn't support AVX. The term "core i5" covers a wide range of architectures from Nehalem to Haswell (current) so using a core i5 CPU doesn't mean that you'll have support for all instruction sets like the lates ones.
I have problems cross compiling some c++ sources that contain sse instruction.
I manage to compile them for simulator (with no extra c++ flag), but for armv7 i get the following error:
#error "SSE instruction set not enabled"
( and following other errors such as:
... unknown type name '__m128'
)
I have looked into clang flags for a flag to activate sse instructions, but did not find
( the source file that i'm trying to compile is gdalgrid.cpp in project gdal,
http://fossies.org/dox/gdal-1.10.1/gdalgrid_8cpp_source.html
)
thx in advance
Similar problem; trying to compile 'make' an altcoin wallet application on ARM7 hardware, the gcc compiler bombs out with
/usr/share/gccxml-0.9/GCC/4.7/xmmintrin.h:32:3: error: #error "SSE instruction
set not enabled"
src/scrypt_mine.cpp: In function ‘void* scrypt_buffer_alloc()’:
src/scrypt_mine.cpp:66:19: error: ‘SCRYPT_BUFFER_SIZE’ was not declared in this scope
src/scrypt_mine.cpp: In function ‘void scrypt(const void*, size_t, uint32_t*, void*)’:
src/scrypt_mine.cpp:87:21: error: ‘scrypt_core’ was not declared in this scope
Makefile:1909: recipe for target 'build/scrypt_mine.o' failed
make: *** [build/scrypt_mine.o] Error 1
What I think is going on is that some implementations of scrypt got made to be so totally dependent on sse instructions on one brand of cpu that they won't compile for another.
Now the solution requires a better answer from the Litecoin people, as what I got to work is only applicable to bitcoin and other sha256d coins:
Ditch any scrypt based coins, as those are limited to a particular brand of cpu which does sse. Compile for sha256d based coins as those are more portable and wallets can work on ARM7 devices including raspberry pi.