C++ Makefile with source in multiple directories and multiple executables - c++

Question

I have a small project for school and I want to write a decent Makefile, I have seen some examples of using Makefile with multiple source directories and multiple executables but still could not implement it properly to my Makefile.
Here is the directory structure:
.
├── bin (this is where i want the executables)
├── build (this is where i want the .o)
├── extern
│ └── doctest.h
├── include
│ ├── file1.hpp
│ └── file2.hpp
├── src
│ ├── file1.cpp
│ └── file2.cpp
├── tests
│ ├── file1-test.cpp
│ └── file2-test.cpp
└── Makefile
PS: I'm using doctest for the unit testing (and i can't change).
Here is my Makefile for the moment:
BIN_DIR = ./bin/
BUILD_DIR = ./build/
EXTERN_DIR = ./extern/
INCLUDE_DIR = ./include/
SOURCE_DIR = ./src/
TESTS_DIR = ./tests/
CXX = clang++-7
CXXFLAGS = -Wall -std=c++11 -g -O3 -I$(INCLUDE_DIR)
EXEC_FILES = file1 file2
BIN = $(addprefix $(BIN_DIR), $(EXEC_FILES))
all: $(BIN)
$(BIN_DIR) $(BUILD_DIR):
mkdir -p $#
$(BUILD_DIR)%.o: $(SOURCE_DIR)%.cpp | $(BUILD_DIR)
$(CXX) $(CXXFLAGS) -c -o $# $^
$(BUILD_DIR)%.o: $(TESTS_DIR)%.cpp | $(BUILD_DIR)
$(CXX) $(CXXFLAGS) -I$(EXTERN_DIR) -c -o $# $^
$(BIN_DIR)file1-test: $(BUILD_DIR)file1.o $(BUILD_DIR)file1-test.o | $(BIN_DIR)
$(CXX) -o $# $^
$(BIN_DIR)file2-test: $(BUILD_DIR)file1.o $(BUILD_DIR)file2.o $(BUILD_DIR)file2-test.o | $(BIN_DIR)
$(CXX) -o $# $^
clean:
rm -f $(BIN_DIR)* $(BUILD_DIR)*
It's working well but I feel like it's doing useless stuff that i could avoid with more knownledge in the Makefile art, sadly I don't have much time.
My goal:
I want to run make and compile all the units tests (all the .cpp in the tests/ directory) and the main program (see PS below).
I want all the executables in the bin/ directory and all the binary files in the build/ directory.
PS: I don't have my main executable yet but it should be stored in the src/ directory at the very end (and be compiled as well while running make).
EDIT 1:
Basically, my question is: How can I write generic rules to prevent copying this (see below) for every new executable in my project ?
$(BIN_DIR)file2-test: $(BUILD_DIR)file1.o $(BUILD_DIR)file2.o $(BUILD_DIR)file2 test.o | $(BIN_DIR)
$(CXX) -o $# $^
EDIT 2:
After some changes, I ended up with this:
BIN_DIR = ./bin/
BUILD_DIR = ./build/
EXTERN_DIR = ./extern/
INCLUDE_DIR = ./include/
SOURCE_DIR = ./src/
TESTS_DIR = ./tests/
vpath %.cpp $(SOURCE_DIR) $(TESTS_DIR)
CXX = clang++-7
CXXFLAGS = -Wall -std=c++11 -g -O3 -I$(INCLUDE_DIR) -I$(EXTERN_DIR)
EXEC_FILES = file1-test file2-test
BIN = $(addprefix $(BIN_DIR), $(EXEC_FILES))
all: $(BIN) | $(BIN_DIR)
$(BUILD_DIR)%.o: %.cpp | $(BUILD_DIR)
#$(CXX) $(CXXFLAGS) -c -o $# $^
# The problem is here
$(BIN_DIR)%: $(BUILD_DIR)%.o
#$(CXX) -o $# $^
$(BIN_DIR) $(BUILD_DIR):
#mkdir -p $#
clean:
-#rm -f $(BIN_DIR)* $(BUILD_DIR)*
I understand this rule (see below) like this: Compile every target in EXEC_FILES to the bin/ directory, from his equivalent .o (obj) in the build/ directory.
$(BIN_DIR)%: $(BUILD_DIR)%.o
#$(CXX) -o $# $^
But in fact I need a rule that will: Compile every target in EXEC_FILES to the bin/ directory, from all their related .o (obj) in the build/ directory.