VC++ optimization double loads from one _mm256_loadu_ps intrinsic - c++

Question

Here's a source:
// Same as multiplyComplex, multiplies 4 numbers
__forceinline __m256 multiplyComplex_x4( const __m256 x, const __m256 y )
{
// If the inputs are [ a, b ] and [ c, d ] the formula is [ ac - bd, ad + bc ]
const __m256 x2 = _mm256_movehdup_ps( x ); // [ b, b ]
const __m256 yRev = _mm256_permute_ps( y, shuffleMask_rev64q ); // [ d, c ]
const __m256 prod2 = _mm256_mul_ps( x2, yRev ); // [ bd, bc ]
const __m256 x1 = _mm256_moveldup_ps( x ); // [ a, a ]
return _mm256_fmaddsub_ps( x1, y, prod2 );
}
// Same as fftMainLoop, handles 4 complex numbers
__forceinline void fftMainLoop_x4( const __m256 omega, complex* a1c, complex* a2c )
{
const __m256 a1 = _mm256_loadu_ps( (const float*)a1c );
const __m256 a2 = _mm256_loadu_ps( (const float*)a2c );
const __m256 product = multiplyComplex_x4( omega, a2 );
_mm256_storeu_ps( (float*)a1c, _mm256_add_ps( a1, product ) );
_mm256_storeu_ps( (float*)a2c, _mm256_sub_ps( a1, product ) );
}
Here's the assembly made by VC++ 2017, the complete loop that calls that function:
00007FF7CC3F11B0 lea eax,[r8+4]
00007FF7CC3F11B4 mov ecx,r8d
00007FF7CC3F11B7 vpermilps ymm0,ymmword ptr [rdi+rax*8],0B1h
00007FF7CC3F11BE vmulps ymm2,ymm0,ymm4
00007FF7CC3F11C2 vfmaddsub231ps ymm2,ymm5,ymmword ptr [rdi+rax*8]
00007FF7CC3F11C8 vmovups ymm3,ymmword ptr [rdi+rcx*8]
00007FF7CC3F11CD vaddps ymm0,ymm2,ymm3
00007FF7CC3F11D1 add r8d,8
00007FF7CC3F11D5 vsubps ymm1,ymm3,ymm2
00007FF7CC3F11D9 vmovups ymmword ptr [rdi+rcx*8],ymm0
00007FF7CC3F11DE vmovups ymmword ptr [rdi+rax*8],ymm1
00007FF7CC3F11E3 cmp r8d,esi
00007FF7CC3F11E6 jb fft_run+1B0h (07FF7CC3F11B0h)
The code reads from memory 50% more often than I would like it to.
The two instructions
vpermilps ymm0,ymmword ptr [rdi+rax*8],0B1h
and
vfmaddsub231ps ymm2,ymm5,ymmword ptr [rdi+rax*8]
both access the same memory address.
Is there a way to convince the compiler to emit vmovups for my _mm256_loadu_ps, instead of trying to merge the load?