Etymology of "logical" vs. "arithmetic" shifts - bit-manipulation

I understand the difference between logical and arithmetic shifts. Why is each named the way it is? What is the history and context of those names?

Bit shifts can be used to do the arithmetic operations of multiplying by two and dividing by two. For example, if you have five (101 in binary) and shift it left two bits (10100 in binary), the result is 20. So shifting left by n bits multiplies by 2n. Similarly, shifting right divides by 2n (with truncation).
In order for arithmetic shifts to work with negative numbers, you have to deal with the sign bit. In two’s complement notation, the high bit represents a negative value. For example, in 16-bit two’s complement, binary 1000 0000 0000 0000 (spaces for ease of counting) is −32,768. If we merely shift it right one bit, the result is 0100 0000 0000 0000, which is 16,384. That is positive, so we have not correctly divided by two. To fix this, an arithmetic shift duplicates the sign bit as it shifts. So the arithmetic right shift of 1000 0000 0000 0000 is 1100 0000 0000 0000, which is −16,384. Similarly, −20 is 1111 1111 1110 1100. An arithmetic shift right by two bits gives 1111 1111 1111 1011, which is −5. (However, note that arithmetic right shifts of negative numbers round results away from zero. For example, −3 shifted right two bits yields −1. So arithmetic shifts round toward −∞.)
With logical shifts, you are just working with the bits as bits. They are not binary numerals representing numbers. You might just be shifting bits to track some items left to process, with a 1 meaning some item that needs attention and a 0 meaning some item that does not. In this case, you do not want a high bit to generate extra 1 bits. These are called logical shifts because you are just using them for Boolean logic purposes—combinations of on and off and functions of them.
Wikipedia has pages on arithmetic shift and logical shift.

Related

Bit in the +/- form [duplicate]

I'm just curious if there's a reason why in order to represent -1 in binary, two's complement is used: flipping the bits and adding 1?
-1 is represented by 11111111 (two's complement) rather than (to me more intuitive) 10000001 which is binary 1 with first bit as negative flag.
Disclaimer: I don't rely on binary arithmetic for my job!
It's done so that addition doesn't need to have any special logic for dealing with negative numbers. Check out the article on Wikipedia.
Say you have two numbers, 2 and -1. In your "intuitive" way of representing numbers, they would be 0010 and 1001, respectively (I'm sticking to 4 bits for size). In the two's complement way, they are 0010 and 1111. Now, let's say I want to add them.
Two's complement addition is very simple. You add numbers normally and any carry bit at the end is discarded. So they're added as follows:
0010
+ 1111
=10001
= 0001 (discard the carry)
0001 is 1, which is the expected result of "2+(-1)".
But in your "intuitive" method, adding is more complicated:
0010
+ 1001
= 1011
Which is -3, right? Simple addition doesn't work in this case. You need to note that one of the numbers is negative and use a different algorithm if that's the case.
For this "intuitive" storage method, subtraction is a different operation than addition, requiring additional checks on the numbers before they can be added. Since you want the most basic operations (addition, subtraction, etc) to be as fast as possible, you need to store numbers in a way that lets you use the simplest algorithms possible.
Additionally, in the "intuitive" storage method, there are two zeroes:
0000 "zero"
1000 "negative zero"
Which are intuitively the same number but have two different values when stored. Every application will need to take extra steps to make sure that non-zero values are also not negative zero.
There's another bonus with storing ints this way, and that's when you need to extend the width of the register the value is being stored in. With two's complement, storing a 4-bit number in an 8-bit register is a matter of repeating its most significant bit:
0001 (one, in four bits)
00000001 (one, in eight bits)
1110 (negative two, in four bits)
11111110 (negative two, in eight bits)
It's just a matter of looking at the sign bit of the smaller word and repeating it until it pads the width of the bigger word.
With your method you would need to clear the existing bit, which is an extra operation in addition to padding:
0001 (one, in four bits)
00000001 (one, in eight bits)
1010 (negative two, in four bits)
10000010 (negative two, in eight bits)
You still need to set those extra 4 bits in both cases, but in the "intuitive" case you need to clear the 5th bit as well. It's one tiny extra step in one of the most fundamental and common operations present in every application.
Wikipedia says it all:
The two's-complement system has the advantage of not requiring that the addition and subtraction circuitry examine the signs of the operands to determine whether to add or subtract. This property makes the system both simpler to implement and capable of easily handling higher precision arithmetic. Also, zero has only a single representation, obviating the subtleties associated with negative zero, which exists in ones'-complement systems.
In other words, adding is the same, wether or not the number is negative.
Even though this question is old , let me put in my 2 cents.
Before I explain this ,lets get back to basics. 2' complement is 1's complement + 1 .
Now what is 1's complement and what is its significance in addition.
Sum of any n-bit number and its 1's complement gives you the highest possible number that can be represented by those n-bits.
Example:
0010 (2 in 4 bit system)
+1101 (1's complement of 2)
___________________________
1111 (the highest number that we can represent by 4 bits)
Now what will happen if we try to add 1 more to the result. It will results in an overflow.
The result will be 1 0000 which is 0 ( as we are working with 4 bit numbers , (the 1 on left is an overflow )
So ,
Any n-bit number + its 1's complement = max n-bit number
Any n-bit number + its 1'complement + 1 = 0 ( as explained above, overflow will occur as we are adding 1 to max n-bit number)
Someone then decided to call 1's complement + 1 as 2'complement. So the above statement becomes:
Any n'bit number + its 2's complement = 0
which means 2's complement of a number = - (of that number)
All this yields one more question , why can we use only the (n-1) of the n bits to represent positive number and why does the left most nth bit represent sign (0 on the leftmost bit means +ve number , and 1 means -ve number ) . eg why do we use only the first 31 bits of an int in java to represent positive number if the 32nd bit is 1 , its a -ve number.
1100 (lets assume 12 in 4 bit system)
+0100(2's complement of 12)
___________________________
1 0000 (result is zero , with the carry 1 overflowing)
Thus the system of (n + 2'complement of n) = 0 , still works. The only ambiguity here is 2's complement of 12 is 0100 which ambiguously also represents +8 , other than representing -12 in 2s complement system.
This problem will be solved if positive numbers always have a 0 in their left most bit. In that case their 2's complement will always have a 1 in their left most bit , and we wont have the ambiguity of the same set of bits representing a 2's complement number as well as a +ve number.
Two's complement allows addition and subtraction to be done in the normal way (like you wound for unsigned numbers). It also prevents -0 (a separate way to represent 0 that would not be equal to 0 with the normal bit-by-bit method of comparing numbers).
Two's complement allows negative and positive numbers to be added together without any special logic.
If you tried to add 1 and -1 using your method
10000001 (-1)
+00000001 (1)
you get
10000010 (-2)
Instead, by using two's complement, we can add
11111111 (-1)
+00000001 (1)
you get
00000000 (0)
The same is true for subtraction.
Also, if you try to subtract 4 from 6 (two positive numbers) you can 2's complement 4 and add the two together 6 + (-4) = 6 - 4 = 2
This means that subtraction and addition of both positive and negative numbers can all be done by the same circuit in the cpu.
this is to simplify sums and differences of numbers. a sum of a negative number and a positive one codified in 2's complements is the same as summing them up in the normal way.
The usual implementation of the operation is "flip the bits and add 1", but there's another way of defining it that probably makes the rationale clearer. 2's complement is the form you get if you take the usual unsigned representation where each bit controls the next power of 2, and just make the most significant term negative.
Taking an 8-bit value a7 a6 a5 a4 a3 a2 a1 a0
The usual unsigned binary interpretation is:
27*a7 + 26*a6 + 25*a5 + 24*a4 + 23*a3 + 22*a2 + 21*a1 + 20*a0
11111111 = 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 = 255
The two's complement interpretation is:
-27*a7 + 26*a6 + 25*a5 + 24*a4 + 23*a3 + 22*a2 + 21*a1 + 20*a0
11111111 = -128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 = -1
None of the other bits change meaning at all, and carrying into a7 is "overflow" and not expected to work, so pretty much all of the arithmetic operations work without modification (as others have noted). Sign-magnitude generally inspect the sign bit and use different logic.
To expand on others answers:
In two's complement
Adding is the same mechanism as plain positive integers adding.
Subtracting doesn't change too
Multiplication too!
Division does require a different mechanism.
All these are true because two's complement is just normal modular arithmetic, where we choose to look at some numbers as negative by subtracting the modulo.
Reading the answers to this question, I came across this comment [edited].
2's complement of 0100(4) will be 1100. Now 1100 is 12 if I say normally. So,
when I say normal 1100 then it is 12, but when I say 2's complement 1100 then
it is -4? Also, in Java when 1100 (lets assume 4 bits for now) is stored then
how it is determined if it is +12 or -4 ?? – hagrawal Jul 2 at 16:53
In my opinion, the question asked in this comment is quite interesting and so I'd like first of all to rephrase it and then to provide an answer and an example.
QUESTION – How can the system establish how one or more adjacent bytes have to be interpreted? In particular, how can the system establish whether a given sequence of bytes is a plain binary number or a 2's complement number?
ANSWER – The system establishes how to interpret a sequence of bytes through types.
Types define
how many bytes have to be considered
how those bytes have to be interpreted
EXAMPLE – Below we assume that
char's are 1 byte long
short's are 2 bytes long
int's and float's are 4 bytes long
Please note that these sizes are specific to my system. Although pretty common, they can be different from system to system. If you're curious of what they are on your system, use the sizeof operator.
First of all we define an array containing 4 bytes and initialize all of them to the binary number 10111101, corresponding to the hexadecimal number BD.
// BD(hexadecimal) = 10111101 (binary)
unsigned char l_Just4Bytes[ 4 ] = { 0xBD, 0xBD, 0xBD, 0xBD };
Then we read the array content using different types.
unsigned char and signed char
// 10111101 as a PLAIN BINARY number equals 189
printf( "l_Just4Bytes as unsigned char -> %hi\n", *( ( unsigned char* )l_Just4Bytes ) );
// 10111101 as a 2'S COMPLEMENT number equals -67
printf( "l_Just4Bytes as signed char -> %i\n", *( ( signed char* )l_Just4Bytes ) );
unsigned short and short
// 1011110110111101 as a PLAIN BINARY number equals 48573
printf( "l_Just4Bytes as unsigned short -> %hu\n", *( ( unsigned short* )l_Just4Bytes ) );
// 1011110110111101 as a 2'S COMPLEMENT number equals -16963
printf( "l_Just4Bytes as short -> %hi\n", *( ( short* )l_Just4Bytes ) );
unsigned int, int and float
// 10111101101111011011110110111101 as a PLAIN BINARY number equals 3183328701
printf( "l_Just4Bytes as unsigned int -> %u\n", *( ( unsigned int* )l_Just4Bytes ) );
// 10111101101111011011110110111101 as a 2'S COMPLEMENT number equals -1111638595
printf( "l_Just4Bytes as int -> %i\n", *( ( int* )l_Just4Bytes ) );
// 10111101101111011011110110111101 as a IEEE 754 SINGLE-PRECISION number equals -0.092647
printf( "l_Just4Bytes as float -> %f\n", *( ( float* )l_Just4Bytes ) );
The 4 bytes in RAM (l_Just4Bytes[ 0..3 ]) always remain exactly the same. The only thing that changes is how we interpret them.
Again, we tell the system how to interpret them through types.
For instance, above we have used the following types to interpret the contents of the l_Just4Bytes array
unsigned char: 1 byte in plain binary
signed char: 1 byte in 2's complement
unsigned short: 2 bytes in plain binary notation
short: 2 bytes in 2's complement
unsigned int: 4 bytes in plain binary notation
int: 4 bytes in 2's complement
float: 4 bytes in IEEE 754 single-precision notation
[EDIT] This post has been edited after the comment by user4581301. Thank you for taking the time to drop those few helpful lines!
Two's complement is used because it is simpler to implement in circuitry and also does not allow a negative zero.
If there are x bits, two's complement will range from +(2^x/2+1) to -(2^x/2). One's complement will run from +(2^x/2) to -(2^x/2), but will permit a negative zero (0000 is equal to 1000 in a 4 bit 1's complement system).
It's worthwhile to note that on some early adding machines, before the days of digital computers, subtraction would be performed by having the operator enter values using a different colored set of legends on each key (so each key would enter nine minus the number to be subtracted), and press a special button would would assume a carry into a calculation. Thus, on a six-digit machine, to subtract 1234 from a value, the operator would hit keys that would normally indicate "998,765" and hit a button to add that value plus one to the calculation in progress. Two's complement arithmetic is simply the binary equivalent of that earlier "ten's-complement" arithmetic.
The advantage of performing subtraction by the complement method is reduction in the hardware
complexity.The are no need of the different digital circuit for addition and subtraction.both
addition and subtraction are performed by adder only.
I have a slight addendum that is important in some situations: two's compliment is the only representation that is possible given these constraints:
Unsigned numbers and two's compliment are commutative rings with identity. There is a homomorphism between them.
They share the same representation, with a different branch cut for negative numbers, (hence, why addition and multiplication are the same between them.)
The high bit determines the sign.
To see why, it helps to reduce the cardinality; for example, Z_4.
Sign and magnitude and ones' compliment both do not form a ring with the same number of elements; a symptom is the double zero. It is therefore difficult to work with on the edges; to be mathematically consistent, they require checking for overflow or trap representations.
Well, your intent is not really to reverse all bits of your binary number. It is actually to subtract each its digit from 1. It's just a fortunate coincidence that subtracting 1 from 1 results in 0 and subtracting 0 from 1 results in 1. So flipping bits is effectively carrying out this subtraction.
But why are you finding each digit's difference from 1? Well, you're not. Your actual intent is to compute the given binary number's difference from another binary number which has the same number of digits but contains only 1's. For example if your number is 10110001, when you flip all those bits, you're effectively computing (11111111 - 10110001).
This explains the first step in the computation of Two's Complement. Now let's include the second step -- adding 1 -- also in the picture.
Add 1 to the above binary equation:
11111111 - 10110001 + 1
What do you get? This:
100000000 - 10110001
This is the final equation. And by carrying out those two steps you're trying to find this, final difference: the binary number subtracted from another binary number with one extra digit and containing zeros except at the most signification bit position.
But why are we hankerin' after this difference really? Well, from here on, I guess it would be better if you read the Wikipedia article.
We perform only addition operation for both addition and subtraction. We add the second operand to the first operand for addition. For subtraction we add the 2's complement of the second operand to the first operand.
With a 2's complement representation we do not need separate digital components for subtraction—only adders and complementers are used.
A major advantage of two's-complement representation which hasn't yet been mentioned here is that the lower bits of a two's-complement sum, difference, or product are dependent only upon the corresponding bits of the operands. The reason that the 8 bit signed value for -1 is 11111111 is that subtracting any integer whose lowest 8 bits are 00000001 from any other integer whose lowest 8 bits are 0000000 will yield an integer whose lowest 8 bits are 11111111. Mathematically, the value -1 would be an infinite string of 1's, but all values within the range of a particular integer type will either be all 1's or all 0's past a certain point, so it's convenient for computers to "sign-extend" the most significant bit of a number as though it represented an infinite number of 1's or 0's.
Two's-complement is just about the only signed-number representation that works well when dealing with types larger than a binary machine's natural word size, since when performing addition or subtraction, code can fetch the lowest chunk of each operand, compute the lowest chunk of the result, and store that, then load the next chunk of each operand, compute the next chunk of the result, and store that, etc. Thus, even a processor which requires all additions and subtractions to go through a single 8-bit register can handle 32-bit signed numbers reasonably efficiently (slower than with a 32-bit register, of course, but still workable).
When using of the any other signed representations allowed by the C Standard, every bit of the result could potentially be affected by any bit of the operands, making it necessary to either hold an entire value in registers at once or else follow computations with an extra step that would, in at least some cases, require reading, modifying, and rewriting each chunk of the result.
There are different types of representations those are:
unsigned number representation
signed number representation
one's complement representation
Two's complement representation
-Unsigned number representation used to represent only positive numbers
-Signed number representation used to represent positive as well as a negative number. In Signed number representation MSB bit represents sign bit and rest bits represents the number. When MSB is 0 means number is positive and When MSB is 1 means number is negative.
Problem with Signed number representation is that there are two values for 0.
Problem with one's complement representation is that there are two values for 0.
But if we use Two's complement representation then there will only one value for 0 that's why we represent negative numbers in two's complement form.
Source:Why negative numbers are stored in two's complement form bytesofgigabytes
One satisfactory answer of why Two2's Complement is used to represent negative numbers rather than One's Complement system is that
Two's Complement system solves the problem of multiple representations of 0 and the need for end-around-carry which exist in the One's complement system of representing negative numbers.
For more information Visit https://en.wikipedia.org/wiki/Signed_number_representations
For End-around-carry Visit
https://en.wikipedia.org/wiki/End-around_carry

Need explanation regarding the idea of two's complement

Can you please explain the solution for the below problem?
I do not understand how we arrive to this conclusion −2^(n−1) + 2^(n−1) −1 −x
Especially I am confused why we need to subtract x
You obtain the representation for a negative number in two’s complement method by taking
one’s complement of a number and then adding one. Why does it work? What is the key idea behind two’s complement representation?
Answer: The key idea is to treat the sign bit as a value with a negative sign. In a n-bit representation,
the value of the sign bit is -2^n1 .
When you have a positive number x. By taking two’s complement you want to get −x.
In a positive number x, the sign bit is 0. When you take the one’s complement of the number, you get:
−2^(n−1) + 2^(n−1) −1 −x
On simplification you get −x−1. When you add +1 to the number (as with two’s complement: take one’s complement and add one), you arrive at −x.
This provides a unique representation for zero. Further all the number calculations are according to powers of two unlike one’s representation for negative numbers.
The solution you provided seems making explanation of One and Two's compliment unnecessarily complicated. Put it short, One's compliment is obtained by flipping all bits in the binary representation of the number. Let's say n = 8, x = 13, then in One's compliment
x = 00001101 (unsigned value 13)
-x = 11110010 (unsigned value 242 = 255 - 13)
i.e. -x is represented as 2^n - 1 - x
Two's compliment is simply One's compliment plus 1:
-x = 11110011 (unsigned value 243 = 255 - 13 + 1)
i.e. -x is represented as 2^n - x
Back to the solution you provided:
−2^(n−1) = 10000000
2^(n−1) −1 = 01111111
−2^(n−1) + 2^(n−1) −1 = 11111111
(−2^(n−1) + 2^(n−1) −1) - x flips all bits in binary representation of x, exactly what One's compliment does. IMO, this explanation is quite counter-intuitive, explanation above (or from Wikipedia) is much better ...
I'm not sure I completely understand your question. Two's complement is format used to make certain things easier and it only works when you're values are limited in some way (a fixed number of bits). For 4-bit words, the one's complement of zero is 1111, to get two's complement you add a 1, which cascades flipping all the bits to 0000, that's convenient. The one's complement of 0001 is 1110, add one and you get 1111, which when interpreted as a signed value is -1.
1's 2's
2 1101 1110
3 1100 1101
4 1011 1100
The first (MSB) bit always indicates if the value is positive or negative. The other values "count up" (1,2,3,4...) for positive values and "count down" (-1,-2,-3...) for negative values.
It's difficult to try to express this in non-discrete algebraic terms, because "numbers" as we generally think about them are infinite.

substraction for two complement numbers

i have read that to subtract two number in two complement encoding, we just add them together.So why there is a sub instruction in assembly language for two complement numbers, there must be one for unsigned number only.
An expression like 5 - 7 is computed in that way : ??
-7 --> unsigned rep --> 0111 --> two complement -> 1001
then the computer do --> 0101 + 1001 = 1110 = -2??
Here's how complement works.
Consider the number -1234.
With 4 digits we'll represent it as
10000
- 1234
which equals
9999 + 1
- 1234
________
8765 + 1
where 8765 is the 9's complement (in the decimal system) of 1234, and 8765 + 1 = 8766 is the 10's complement (in the decimal system).
To compute 5555 - 1234 you can simply do 10000 + 5555 - 1234 = 5555 + 8766. After calculating that, substract the 10000 again. And that's as simple as just ignoring the fifth digit.
You have just calculated a subtraction of 1234 by instead adding its 10's complement.
A subtraction operation for binary 2's complement form representation works by (1) computing the 2's complement, and (2) adding – which is different from just adding.
The original post is correct. On a typical two's complement computer, the actual subtract operation produces the same result regardless if the numbers are signed or unsigned, so the actual subtract operation can assume unsigned numbers, but it sets two different conditional bits, setting or clearing a "borrow" bit assuming the numbers are unsigned, and setting or clearing an "overflow" bit assuming the numbers are signed.
Some processors use actual subtract hardware logic, instead of using negate and add.

Are negative numbers that are left shifted *always* filled in with "1" instead of "0"?

I'm independently studying bit-shifting by porting some C++ functions to .NET's BigInteger. I noticed that when I shifted BigInteger the void was filled in with ones.
I believe this has to do with the negative number being stored in twos compliment form.
BigInteger num = -126;
compactBitsRepresentation = (uint)(int)(num << 16);
Here is what happened after the shift (most significant bit first)
10000010 will be shifted 16
11111111100000100000000000000000 was shifted 16
Should I always expect a similar bit-shift operation to act this way? Is this consistent with different languages and implementations of "bigNumber" such as OpenSSL?
From the BigInteger.LeftShift operator docs:
Unlike the bitwise left-shift operation with integer primitives, the
LeftShift method preserves the sign of the original BigInteger value.
So .NET guarantees the behavior that you see.
I'm not that familiar with bignum libraries, but the docs for OpenSSL's BIGNUM BN_lshift()` function says:
BN_lshift() shifts a left by n bits and places the result in r ("r=a*2^n"). BN_lshift1() shifts a left by one and places the result in r ("r=2*a").
Since the operation is defined in terms of multiplication by a power of two, if you convert the resulting BIGNUM to a two's complement number (I have no idea how BIGNUM represents numbers internally) then you'll see similar behavior to .NET.
I wouldn't be surprised if other bignum libraries behaved similarly, but you'd really need to check the docs if you want to depend on the behavior. However, since shifting is very similar to multiplication or division by powers of two, you can probably get 'portable' behavior by using an appropriate multiplication or division instead of a shift. Then all you'd need to ensure is that you can get the conversion to a two's complement representation (which is an issue that is really independent of the behavior of the shift operation).
Should I always expect a similar bit-shift operation to act this way?
You should if the number format in question uses two's complement to represent negative numbers (and many do). To form the two's complement of a number, you invert all the bits and add one, so for example:
23 is represented as 00010111
-23 is represented as 11101001 (that is, 11101000 + 1)
Furthermore, when you convert a type to a larger type, the value is usually sign-extended, i.e. the leftmost bit is extended into the extra bits in the larger type. That preserves the sign of the number.
So yes, it's quite common for numeric representations to be "filled" with 1 for numeric values.
10000010 is first changed to a bigger width. In this case, 4 bytes:
10000010 --> 11111111 11111111 11111111 10000010
You get 1s on the left since the number is negative.
Now the left shift simply inserts 0s from the right and throw bits from the left:
11111111 11111111 11111111 10000010 << 16 -->
11111111 10000010 00000000 00000000

I don't seem to understand the output of this program regarding conversion of integer pointer to character pointer

In the program below i initiliaze i to 255
Thus in Binary we have:
0000 0000 1111 1111
That is in Hex:
0x 0 0 f f
So according to Little-Endian layout:
The Lower Order Byte - 0xff is stored first.
#include<cstdio>
int main()
{
int i=0x00ff; //I know 0xff works. Just tried to make it understable
char *cptr=(char *)&i;
if(*(cptr)==-127)
printf("Little-Endian");
else
printf("Big-Endian");
}
So, when i store the address of i in cptr it should point to the Lower Byte (assuming Little Endian, coz that is what my System has) .
Hence, *cptr contains 1111 1111. This should come down to -127. Since, 1 bit is for the Sign-bit.
But when i print *cptr's value i get -1, why is it so?
Please explain where am i going wrong?
Where did you get the idea that 1111 1111 is -127? Apparently, you are assuming that the "sign bit" should be interpreted independently from the rest of the bits, i.e. setting the sign bit in binary representation of +127 should turn it into -127, right? Well, a representation that works that way does indeed exist: it is called Signed Magnitude representation. However, it is virtually unused in practice. Most modern machines use 2's Complement representation for signed types, which is a completely different thing.
On a 2's-complement machine 1111 1111 has always been -1. -127 would be 1000 0001. And 1000 0000 is -128, BTW.
On top of that keep in mind that char type is not necessarily signed. If you specifically need a signed type, you have to spell it out: signed char.
1111 1111 is a -1 because -1 is the largest negative integral number. Remember that -1 is more then -2 in math, so binary representation should have the same properties for the convenience. So 1000 0001 will represent -127.
There are three ways to represent negative numbers in binary: Signed magnitude, ones-complement and twos-complement.
The signed magnitude is easiest to understand: One bit is used to represent the sign (0=+, 1=-), the other bits represent the magnitude of the value.
In ones-complement, a negative value is obtained by performing a bitwise inversion on the corresponding positive number (toggle all bits)
In twos-complement, the way to convert between positive and negative numbers is less straightforward (flip all bits, then add 1), but it has some characteristics that make it particularly useful in computers.
Because computers work very well with twos-complement representations, that is what gets used in most computers for representing integers.
What is going wrong is that you expected a signed magnitude representation (highest bit set, so negative value. All other bits set as well, so value = -127), but the computer is using twos-complement representation (where all bis set == -1).