Getting Eclipse to read includes from makefile - c++

I have a makefile which compiles my code just fine when running make.
If a create a makefile project in eclipse and import my already existing makefile it is possible to build the project.
But Eclipse does not resolve names, as it cannot find my include files. Is there a way where Eclipse automatically can read include paths from the makefile?
My makefile looks like this
# Put your stlink folder here so make burn will work.
STLINK=~/Programs/stlink
# Put your source files here (or *.c, etc)
SRCS=main.c system_stm32f4xx.c ../src/*.c
# Binaries will be generated with this name (.elf, .bin, .hex, etc)
PROJ_NAME=blinky
# Put your STM32F4 library code directory here
STM_COMMON=../STM32F4-Discovery_FW_V1.1.0
# Normally you shouldn't need to change anything below this line!
#######################################################################################
CC=arm-none-eabi-gcc
OBJCOPY=arm-none-eabi-objcopy
CFLAGS = -g -O2 -Wall -Tstm32_flash.ld
CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m4 -mthumb-interwork
CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
CFLAGS += -I.
# Include files from STM libraries
CFLAGS += -I$(STM_COMMON)/Utilities/STM32F4-Discovery
CFLAGS += -I$(STM_COMMON)/Libraries/CMSIS/Include -I$(STM_COMMON)/Libraries/CMSIS/ST/STM32F4xx/Include
CFLAGS += -I$(STM_COMMON)/Libraries/STM32F4xx_StdPeriph_Driver/inc
CFLAGS += -I ../include/
# add startup file to build
SRCS += $(STM_COMMON)/Libraries/CMSIS/ST/STM32F4xx/Source/Templates/TrueSTUDIO/startup_stm32f4xx.s
OBJS = $(SRCS:.c=.o)
.PHONY: proj
all: proj
proj: $(PROJ_NAME).elf
$(PROJ_NAME).elf: $(SRCS)
$(CC) $(CFLAGS) $^ -o $#
$(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex
$(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin
clean:
rm -f *.o $(PROJ_NAME).elf $(PROJ_NAME).hex $(PROJ_NAME).bin
# Flash the STM32F4
burn: proj
$(STLINK)/st-flash write $(PROJ_NAME).bin 0x8000000

Related

Makefile unable to link libraries during runtime

So I am using nvidia's deepstream sdk and trying to modify the makefile of one of the sample examples given as I wish to link and add my own libraries. This is the makefile being employed where I am setting the path of the CUSTOM_LIB to point to the location of my library. The issue is the project gets compiled successfully but during run time, its unable to find the custom library. I performed ldd on the executable generated and there also it was showing the library as 'not found'. I think it's something to do with rpath but I am not sure about that.
APP:= sample
TARGET_DEVICE = $(shell gcc -dumpmachine | cut -f1 -d -)
NVDS_VERSION:=4.0
LIB_INSTALL_DIR?=/opt/nvidia/deepstream/deepstream-$(NVDS_VERSION)/lib/
ifeq ($(TARGET_DEVICE),aarch64)
CFLAGS:= -DPLATFORM_TEGRA
endif
CUDA_VER:=10.0
CC:=g++
SRCS:= $(wildcard ../src/*.c)
#SRCS+= $(wildcard ../../apps-common/src/*.c)
#SRCS+=
INCS:= $(wildcard ../include/*.h)
PKGS:= gstreamer-1.0 gstreamer-video-1.0 x11 opencv
OBJS:= $(SRCS:.c=.o)
CFLAGS+= -I../include -I/usr/include -I$(CUSTOM_LIB)/include -I/usr/local/cuda-10.0/targets/aarch64-linux/include/ -I/usr/include/jsoncpp -DDS_VERSION_MINOR=0 -DDS_VERSION_MAJOR=4 -fpermissive -Wnarrowing
LIBS+= -L$(LIB_INSTALL_DIR) -L/usr/lib/aarch64-linux-gnu -L$(CUSTOM_LIB)/lib -L/usr/lib/aarch64-linux-gnu/ -lcurl -letlic -letolm -lssl -lcrypto -llogger -lpthread -lsqlite3 -ljsoncpp -lnvdsgst_meta -lnvbufsurface -lnvbufsurftransform -lnvds_meta -lnvdsgst_helper -lnvds_utils -lm -L/usr/local/cuda-$(CUDA_VER)/lib64/ -lcudart \
-lgstrtspserver-1.0 -Wl,-rpath,$(LIB_INSTALL_DIR)
CFLAGS+= `pkg-config --cflags $(PKGS)`
LIBS+= `pkg-config --libs $(PKGS)`
all: $(APP)
debug: CXXFLAGS += -DDEBUG -g
debug: CFLAGS += -DDEBUG -g
debug: $(APP)
%.o: %.c $(INCS) Makefile
$(CC) -c -o $# $(CFLAGS) $<
$(APP): $(OBJS) Makefile
$(CC) -o $(APP) $(OBJS) $(LIBS)
clean:
rm -rf $(OBJS) $(APP)
You need to set rpath to a colon-separated list of directories where your libraries are found. You only add LIB_INSTALL_DIR but not CUSTOM_LIB_DIR. Generally everything you pass to -L you need to pass to -rpath too, unless there is a specific reason not to. For example, if you are building a package that has more than a single library and you are going to install in a standard place like /usr/lib, you don't have to add the directory where libraries temporarily live to -rpath. If you are going to install to a non-standard directory, add that directory.

How to modify library in makefile

I have a makefile that I need to modify to include the path to libraries.I am trying to run program given to me by someone else. I'm really confused on how the makefile works and don't understand what the previous lines are.
These are the directions given to me to modify the makefile:
Change the lines:
INCS = -I"../../LIB/libpca/include"
LIBS = -L"../../LIB/libpca/build" -lpca -larmadillo
in the Makefile to represent the folder where you installed the libpca and armadillo libraries.
Now I now what my new paths are:
Desktop/PCA-CD/Libraries
but I don't understand what is is that I really need to change.
Here is what the makefile looks like:
PROG = CD
UNAME := $(shell uname)
ifeq ($(UNAME), Darwin)
CXX = clang++ -stdlib=libc++
else
CXX = g++
endif
FLAGS = -O0 -g3 -Wall -std=c++0x -pthread
INCS = -I"../../LIB/libpca/include"
LIBS = -L"../../LIB/libpca/build" -lpca -larmadillo
SRCS = CD.cpp
RM = rm -f
all :
$(CXX) $(FLAGS) $(INCS) $(SRCS) $(LIBS) -o $(PROG)
# $(CXX) $(FLAGS) $(SRCS) -o $(PROG)
clean :
$(RM) $(PROG)
Thanks for any help provided.
I think they're suggesting to change the line:
INCS = -I"../../LIB/libpca/include"
LIBS = -L"../../LIB/libpca/build" -lpca -larmadillo
to
INCS = -I"Desktop/PCA-CD/Libraries/include"
LIBS = -L"Desktop/PCA-CD/Libraries/build" -lpca -larmadillo
Notice that Desktop/PCA-CD/Libraries is a relative path, and assumes that the library is stored in the subdirectory of the build directory. From your build directory, try running ls Desktop/PCA-CD/Libraries/build, to confirm it is right path. If it's not, replace it with the absolute path of the directory where you installed the library.

makefile not finding header file from -I include path

I have the makefile given below. When I do make I get the following error
cc -c -o timing.o timing.c
test_c.c:5:17: fatal error: test.h: No such file or directory
#include "test.h"
I have manually verfied that test.h is present in ../include path. I am not sure why this is not finding the header file.It would be great if someone could help.Also I would expect g++ instead of cc
# Makefile template for shared library
CXX = g++ # C++ compiler
CXXFLAGS = -fPIC -Wall -Wextra -O2 -g -I../include #CXX flags
LDFLAGS = -lboost_system -shared # linking flags
RM = rm -f # rm command
TARGET_LIB = libtest.a # target lib
C_SRCS := test_a.c test_b.c
CPP_SRCS := test_c.cpp test_d.cpp
OBJS := $(C_SRCS:.c=.o) $(CPP_SRCS:.cpp=.o)
.PHONY: all
all: ${TARGET_LIB}
$(TARGET_LIB): $(OBJS)
$(CXX) $(CXXFLAGS) ${LDFLAGS} -o $# $^
.PHONY: clean
clean:
-${RM} ${TARGET_LIB} ${OBJS}
~
You have not written a rule for building timing.o from timing.c, so Make uses the default rule it has for that.
But that rule uses CFLAGS, not CXXFLAGS. The CXXFLAGS variable appears in the rule for building object files from C++ sources.
So modify CFLAGS instead of CXXFLAGS, and it should work.

makefile for boost crossplatform

I have created a makefile for a library I am compiling.
I have already got the makefile working on windows and linux , but there is a different makefile for each OS.
How could I allow this to work on both OS without hardcoding the path to the boost library and boost headers below:
Do I need to add the boost folder to the path variable? do I need to add the library directory to some OS variable?
makefile windows:
# source files.
SRC = protoService.cpp protocolBaseServer.cpp client.cpp
OBJ = $(SRC:.cpp=.o)
OUT = ../libutils.a
# include directories
INCLUDES = -I. -I../include/ -IC:\boost_1_59_0\
# C++ compiler flags (-g -O2 -Wall)
CCFLAGS = -g -MD -MP -std=c++0x -Wall -c
# compiler
CCC = g++
# library paths
LIBS = -LC:\boost_1_59_0\libs -lboost_serialization
# compile flags
LDFLAGS = -g
.SUFFIXES: .cpp
default: $(OUT)
.cpp.o:
$(CCC) $(INCLUDES) $(CCFLAGS) $< -o $#
$(OUT): $(OBJ)
ar rcs $(OUT) $(OBJ)
#depend: dep
#dep:
# makedepend -- $(CFLAGS) -- $(INCLUDES) $(SRC)
clean:
rm -f $(OBJ) $(OUT) Makefile.bak
-include $(DEPS:%.o=%.d)
makefile linux:
# source files.
SRC = protoService.cpp protocolBaseServer.cpp client.cpp
OBJ = $(SRC:.cpp=.o)
OUT = ../libutils.a
# include directories
INCLUDES = -I. -I../include/ -I/usr/local/include -I/usr/share/boost_1_58_0/
# C++ compiler flags (-g -O2 -Wall)
CCFLAGS = -g -MD -MP -std=c++0x -Wall -c
# compiler
CCC = g++
# library paths
LIBS = -L/usr/share/boost_1_58_0/lib/ -lboost_serialization
# compile flags
LDFLAGS = -g
.SUFFIXES: .cpp
default: $(OUT)
.cpp.o:
$(CCC) $(INCLUDES) $(CCFLAGS) $< -o $#
$(OUT): $(OBJ)
ar rcs $(OUT) $(OBJ)
#depend: dep
#dep:
# makedepend -- $(CFLAGS) -- $(INCLUDES) $(SRC)
clean:
rm -f $(OBJ) $(OUT) Makefile.bak
-include $(DEPS:%.o=%.d)
Make passes environment variables to the makefile processor, so you can create make variables based on them.
INC_PATHS := ../include/ .
LIBS += boost_serialization
ifeq ($(OS),"Windows_NT")
INC_PATHS += ../include/ C:/boost_1_59_0/libs
LIBS += boost_serialization
else
INC_PATHS += /usr/local/include /usr/share/boost_1_58_0/lib/
endif
And then
INCLUDES = $(prepend -I,$(INC_PATHS))
or something like that. I'm not in front of make to ensure the syntax is exactly correct, but it should get you moving in the right direction.

Building multiple shared libraries with one Makefile

I'm trying to build multiple shared libraries in one makefile. This is what I'm using to build one shared library:
CC = gcc # C compiler
PWD := $(shell pwd)
CFLAGS = -fPIC -Wall -Wextra -O2 -g # C flags
LDFLAGS = -shared # linking flags
RM = rm -f # rm command
CFLAGS += $(DFLAGS)
TARGET_LIB := lib1.so # target lib
#TARGET_LIB += lib2.so
SRCS := lib1.c # source files
#SRCS += lib2.c # source files
OBJS = $(SRCS:.c=.o)
.PHONY: all
all: $(TARGET_LIB)
$(TARGET_LIB): $(OBJS)
$(CC) $(INC) $(LDFLAGS) $(CFLAGS) -o $# $^
However, I can't just uncomment the lines for lib2 and have it being built as well. It's likely because $(TARGET_LIB): $(OBJS) expands to lib1.so lib2.so : lib1.o lib2.o which isn't what I want.
Instead, I want something like
lib1.so : lib1.o
lib2.so : lib2.o
But I'm not sure how to do so or what it is called. Can someone tell me what to do to achieve what I'm looking for?
EDIT: I should have been more clear. I realize you can add more targets to build these. But is there a way to do it without having to write a new target everytime I want to add a new library?
Thanks.
You can do something like this -
all : lib1.so lib2.so
and provide rules to make lib1.so and lib2.so
You can separate sources of two libraries into different directories. It also may help in further maintenance of your libraries. Then use one make file which will trigger corresponding sub-makefiles. I may be better than one big makefile
You can do it by separating targets like this:
CC = gcc # C compiler
PWD := $(shell pwd)
CFLAGS = -fPIC -Wall -Wextra -O2 -g # C flags
LDFLAGS = -shared # linking flags
RM = rm -f # rm command
CFLAGS += $(DFLAGS)
TARGET_LIB1 = lib1.so # target lib
TARGET_LIB2 = lib2.so
TARGET_LIBS = $(TARGET_LIB1) $(TARGET_LIB2)
SRCS1 = lib1.c # source files
SRCS2 = lib2.c # source files
SRCS = $(SRCS1) $(SRCS2)
OBJS1 = $(SRCS1:.c=.o)
OBJS2 = $(SRCS2:.c=.o)
OBJS = $(OBJS1) $(OBJS2)
.PHONY: all
all: $(TARGET_LIBS)
$(TARGET_LIB1): $(OBJS1)
$(CC) $(INC) $(LDFLAGS) $(CFLAGS) -o $# $^
$(TARGET_LIB2): $(OBJS2)
$(CC) $(INC) $(LDFLAGS) $(CFLAGS) -o $# $^
The implicit rules are for that. Read about them in the GNU Make manual.
Replace
$(TARGET_LIB): $(OBJS)
with
%.so: %.c