makefile: user function (macro) ifeq does not work as expected [closed] - if-statement

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OBSOLETE: not of interest anymore.
I am trying to validate and choose the execution path of a makefile macro using ifeq makefile conditional...
I am using makefiles inside mingw and a very old version of make (3.79.1) but the build system cannot be altered to update to the latest make version.
I am sending parameters to the user function and based on these parameters I would like to evaluate the execution path:
define CHECK_FILE
if ($(1),))
$(error Empty file provided to check! - $(1))
endif
ifeq ($(wildcard $(1)),)
$(error Invalid file provided for checking (file does not exist)! - $(1)!)
endif
ifeq ($(2),SPEED)
$(ROOT_PATH)/Tools/testSpeed.exe $(1)
else ifeq ($(2),ENDURANCE)
$(ROOT_PATH)/Tools/testStability.exe $(1)
else ifeq ($(2),MEMORY)
$(ROOT_PATH)/Tools/check_leaks.exe 8079 $(1)
else
$(error Bad test provided - $(2)!)
endif
endef
The problem is that I always get the "Empty file provided to check! - ..." error.. What am I doing wrong?
I cant even add an echo in this macro.... it simply wont print out anything! so that`s all about debugging...
Given my current experience - I hate gnu make and msys/mingw with each and every cell of my body... I appreciate any help to avoid hating it in the future.
The macro is called from several places, including lots of foreach loops:
someTArget:
#$(foreach outFile,$(INCLUDED_FILES),$(call CHECK_FILE,$(FILE_OUT_PATH)/$(outFile),MEMORY))
#$(foreach outFile,$(BUILT_BIN_FILES),$(call CHECK_FILE,$(FILE_OUT_PATH)/$(outFile),ENDURANCE))
#$(foreach outFile,$(BUILT_BIN_FILES),$(call CHECK_FILE,$(FILE_OUT_PATH)/$(outFile),SPEED))
using MSDOS batch files in msys/mingw/make would not work as it does not see the parameters %1...%n and can`t evaluate environment variables.
Thank you!

The final 'enddef' should be written 'endef'.
See GNU documentation here : GNU make - Defining
Something else : at the line
foreach external,$(INCLUDED_FILES),$(call CHECK_FILE,$(FILE_OUT_PATH)/$(outFile),MEMORY))
You refer to 'outFile' but you var is 'external'.

Related

Function not available for .Call using Rcpp.package.skeleton() and compileAttributes [closed]

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I am trying to follow closely the directions in the Rcpp package documentation, but I am getting the error
Error in .Call("MicroCreditLRVBR_TestJacobian", PACKAGE = "MicroCreditLRVBR") :
"MicroCreditLRVBR_TestJacobian" not available for .Call() for package "MicroCreditLRVBR"
The package framework was built with Rcpp.package.skeleton(). I copied in my R and C++ code, modified the Makevars to point to some code outside the package, updated the DESCRIPTION to link to RcppEigen, and ran compileAttributes(). I then ran R CMD build to create a .gz file and R CMD INSTALL to install it. It built and linked successfully, but terminated with the above error.
I can see that the function MicroCreditLRVBR_TestJacobian is indeed defined in RcppExports.cpp and RcppExports.R. I don't know why it is not available for .Call.
Note that NAMESPACE includes useDynLib(MicroCreditLRVBR) and exportPattern("^[[:alpha:]]+").
A public copy of the package in its current state is in this github repo. Any help would be appreciated.
When you switched the name from:
MicroCreditLRVB
to
MicroCreditLRVBR
You forgot to modify the package name in the NAMESPACE file
e.g.
useDynLib(MicroCreditLRVB)
goes to:
useDynLib(MicroCreditLRVBR)
Also, remove lines 1-22 from microcredit_stan_lib.R. They should be put into a "demo" file found within the /inst.
Lastly, import boost headers using the BH and cut down on the absolute paths within the Makevars.
The problem was resolved by removing the line
jac_test <- TestJacobian()
from the file microcredit_stan_lib.R.
For future reference, I had a C++ file in src/ that defined
// [[Rcpp::export]]
Rcpp::List TestJacobian() {
... do stuff ...
}
..and a library file R/microcredit_stan_lib.R that had a line in the outermost environment
jac_test <- TestJacobian()
By commenting out jac_test <- TestJacobian(), the problem was resolved. I'm not sure why.

Executing makefile [closed]

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I have a makefile in which I added sources files and header files and linked them. I am 100% sure that this makefile is correct because I asked my professors and TA. However, I do not know how to execute a makefile. I have a main.c file in which I have bunch of print statements.
In my makefile I have :
all: main
I am trying to run this by following commands:
make clean
make main
However, nothing is being printed out, it just complies and thats it but I want a way to run this program, how do i do that?
You need to use the all rule like this ...
make all
... or simply ...
make
This is assuming your makefile is named "Makefile" or "makefile". If it is named something else, you'll need the -f option:
make -f app.mak
Note: I'm using "app.mak" as an example.
If you want to execute your program after making it. You'll have to add another line, such as:
all: main
./main
This is assuming your executable is in the current directory and its named main.
You don't want to execute a makefile; you're doing that by running make. Make builds programs. It doesn't usually run programs that it builds, although it can do so.
In your example above if you want to run the program after make builds it, you just use:
./main
to run it. If you want to create a makefile rule that will run the program, you can add to your makefile something like:
run: main
./main
If you put this at the end of the makefile then you can run make run to build and run the program. If you put it at the beginning of the makefile (before all anyway) then you can type make and it will build and run the program, or type make all or make main and it will just build the program without running it.

In Linux, after installing the sdk, still it saying No such file or directory, how to fix it? [closed]

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I am trying to run and compile one application which needs to use the third party sdk_linux32.
But its missing the header file always even i did what mentioned in readme file. Any idea what am i missing?
/*Manual says this following should install the SDK without any problem so i did*/
$cd sdk_linux32
$sudo mkdir /usr/lib/sdk_linux32
$sudo cp -r build/bin/release/* /usr/lib/sdk_linux32
$sudo ldconfig /usr/lib/sdk_linux32
$g++ main.cpp -lsdk_linux32 -o MyApp
main.cpp ... fatal error: sdk_linux/Core.h: No such file or directory
compilation terminated.
main.cpp:
#include <sdk_linux/Core.h>
int main()
{
return 0;
}
As a guess - try below - you need to tell gcc where the header files are
g++ main.cpp -I/usr/lib/sdk_linux32
EDITED
And looking at your latest comment - you also need to tell the linker where the library is located
g++ main.cpp -I/usr/lib/sdk_linux32 -L/usr/lib/sdk_linux32/lib
Where is the Core.h file actually located? (Hint: use "find /usr/lib/sdk_linux32 -type f -name Core.h" to find it.)
I'm guessing you didn't name your directory correctly in /usr/lib. You named it sdk_linux32, but the code seems to be looking for sdk_linux, but that's just a WAG ...

CXXSources-- what are they?

I'm new to compiling C/C++ with the aid of make. I downloaded an open source project and noticed that there is in the make file CXXSources and CXXObjects. I think I understand roughly what the make file is doing with them but...
I don't have any of the source files listed under CXXSources. Are these like dependences I'm supposed to know how to find? Is there any custom as to what CXXSource is versus just Source?
Added link to project: http://www.fim.uni-passau.de/en/fim/faculty/chairs/theoretische-informatik/projects.html
More specifically, the GML parser, eg. http://www.fim.uni-passau.de/fileadmin/files/lehrstuhl/brandenburg/projekte/gml/gml-parser.tar.gz
It seems to be getting stuck on the line:
gml_to_graph : $(CXXOBJECTS) gml_scanner.o gml_parser.o
$(CXX) -o gml_to_graph_demo $(CXXOBJECTS) gml_parser.o gml_scanner.o -L$(LEDADIR)/lib -lG -lL -lm
The $CXXObjects is defined by
CXXSOURCES = gml_to_graph.cc gml_to_graph_demo.cc
CXXOBJECTS = $(CXXSOURCES:.cc=.o)
So I need gml_to_graph.cc, it seems. Or maybe I'm wrong?
Usually, the variables are set before the point where you see them. This could be
(a) via the environment
(b) before including the quoted makefile
(c) in the quoted makefile, but preceding the location quoted
To see (verbosely) what GNU make takes into account, do:
make -Bn
(it will show everything that _would get executed)
Even more verbose:
make -p all
It will show you all the internal variable expansions.
If you post a link or more information, we will be able to come up with less generic (and hence possibly less confusing) answers

Tool to track #include dependencies [closed]

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Any good suggestions? Input will be the name of a header file and output should be a list (preferably a tree) of all files including it directly or indirectly.
If you have access to GCC/G++, then the -M option will output the dependency list. It doesn't do any of the extra stuff that the other tools do, but since it is coming from the compiler, there is no chance that it will pick up files from the "wrong" place.
Thanks to KeithB. I looked up the docs for cl.exe (VS2008) and found the /showIncludes flag. From the IDE, this can be set from the property page of any CPP file.
For a heavy weight solution, you should check out doxygen. It scans through your code base and comes up with a website, effectively, that documents your code. One of the many things it shows is include trees.
If you were looking to be able to plug the output of this tool into some other process, then this may not work for you (although doxygen does output to other formats, I'm not real familiar with that feature). If you simply want to eyeball the dependencies, though, it should work great.
I've played around with a tool called cinclude2dot. It was pretty useful in getting a handle on a rather large codebase when I came to work here. I've actually thought about integrating it into our daily build eventually.
Good news: redhat Source-Navigator (runs on Windows too). Of course, compiler switches (mentioned earlier) have superior parsing and I'm not sure how this will handle MFC, Qt and their magic keywords.
First, cinclude2dot.pl is a perl script which analyses C/C++ code and produces a #include dependency graph as a dot file for input into graphviz.
http://www.flourish.org/cinclude2dot/
If you don't want to go the way of that sort of manual tool, then the hands-down by far winner is in my opinion a tool known as "IncludeManager" from ProFactor.
http://www.profactor.co.uk/includemanager.php
There's a free trial, and it is awesome. It's a plug-in for Visual Studio that's totally integrated so double clicking on something over here takes you to the place where it is included over there.
Tooltip mouseovers give you all the info you would want, and it lets you drill down / up, remove whole subtrees you don't care about, view representations other than graphs, cycle through a list of matches for this and that, it's wonderful.
If you're quick about it, you can refactor the #include structure of a large projects before the trial runs out. Even so, it doesn't cost much, about $35 per license.
For what it does, it is just about perfect. Not only #include graphs but also cross project dependencies of shared files, impact on build times, detailed properties in grids, perfect.
Building on KeithB's answer, here is GNUmake syntax to automatically 1) generate the dependency files, 2) keep them up to date, and 3) use them in your makefile:
.dep:
mkdir $#
.dep/%.dep: %.c .dep
(echo $# \\; $(CC) $(IFLAGS) -MM $<) > $# || (rm $#; false)
.dep/%.dep: %.cpp .dep
(echo $# \\; $(CXX) $(IFLAGS) -MM $<) > $# || (rm $#; false)
DEPEND := $(patsubst %.dep,.dep/%.dep,$(OBJ:.o=.dep))
-include $(DEPEND)
(Make sure to change those indents to hardtabs.)
You can also check out makedepend:
http://en.wikipedia.org/wiki/Makedepend
http://www.xfree86.org/current/makedepend.1.html
Understand for C++ should be able to help you: it builds a database that you can access from Perl.
cscope (http://cscope.sourceforge.net/) does this in a standalone xterm, and also can be used inside your favorite editor - it has great emacs and vi/vim support.