VHDL: Cosine Lookup Table - drawing

Question

I am working with VGA on my Basys3 FPGA, and I currently want to draw a zone plate, for which the equation is (1 + cos(k*r^2)) / 2, where r is the distance from the plate center, and k=2*pi/lambda is the wavenumber, which determines the scale of the plate. I am guessing the best course of action would be to use a cosine LUT, but I really have no idea how to create one. I somewhat understand the idea behind it, but I don't know how to write one and what values it should contain.
This is the code I am trying to test out:
The only problem with this now is that I do not know what values to fill the memory_type :=() with, so that it will equal the k*r^2 from the formula.
architecture Behavioral of VGAdraw is
signal i : integer range 0 to 29:=0;
signal r : integer :=2;
type memory_type is array (0 to 29) of integer range -128 to 127;
signal cosine : memory_type :=();
begin
process(CLK)
begin
if (CLK'EVENT and CLK = '1') then
if (cntHor >= 0) AND (cntHor <= cstHorAL - 1) then
RED <= conv_std_logic_vector ((1 - cosine (i)) / 2, 8) (7 downto 4);
GREEN <= conv_std_logic_vector ((1 - cosine (i)) / 2, 8) (7 downto 4);
BLUE <= conv_std_logic_vector ((1 - cosine (i)) / 2, 8) (7 downto 4);
i <= i + 1;
else
RED <= "0000";
GREEN <= "0000";
BLUE <= "0000";
end if;
end if;
end process;
end Behavioral;
cntHor - horizontal counter
cstHorAL - nr of pixels on an active line
I cannot post the image itself due to lack of reputation, but this is what it should look like: http://handforgedvideo.com/wp-content/uploads/2013/02/1920x1080p24_Luma_Zone_Plate_Main.png
Any help is appreciated.
Thank you!

Answer 1

Your general code isn't too far off, but as Morten pointed out, you don't specify the format of the input (theta) or the outputs (sin_data and cos_data). Are they fixed point values? Where's the fractional point? Are they just integers?
You say:
I am guessing the best course of action would be to use a cosine LUT, but I really have no idea how to create one.
I presume you mean by "LUT" a generic "lookup table". The use of "LUT" is ambiguous in your question since you also mention the Basys3. In FPGA literature, LUT is a specific type of logic structure on an FPGA. It also means "lookup table", but the size and complexity are limited to a few digital inputs. There are no "cosine LUT" objects available. I just wanted to be clear that by "LUT" you mean a generic lookup table.
Now, your code isn't too far off. It is indeed a lookup table to pass in theta and output sin_data and cos_data. The questions are a) whether or not your outputs accurately represent the function and b) whether or not your implementation is the most efficient.
For the former, I'm not sure since you don't specify the input and output format. Also, you don't specify the mapping between ϴ and your function. Is ϴ the argument to cos()? Or is it k? Or is it λ?
For the latter, take a look at Xilinx UG901. It gives examples of how to infer ROMs (see the 'ROM HDL Coding Techniques' section). Your code, as written, would probably be the least efficient method. You need two lookup tables with 4K entries each (sin_data and cos_data), so two 4K x 12bit. You'd be better off with a ROM build from a block RAM.