I am trying to work through the following http://www.cs.columbia.edu/~keenan/Projects/DGPDEC/paper.pdf. The following source files are used to illustrate what is going on https://github.com/dgpdec/course. Now I cannot get it to work. Here is what I tried:
First I went into the folder 'basecode', edited the Makefile to have the right include and library paths. Then I want to make but it gives me the error
'ostream’ in namespace ‘std’ does not name a type
I looked for this error online but I could not find a solution to the problem. In the included file libddg_userguide.pdf it says that I should edit the Makefile in root libddg folder but I don't know which folder that is. I am sorry for the kind of nooby question but I am really stuck and have been trying for a long time. Here is the Makefile I used (in the Basecode folder) for reference:
##########################################################################################
# Specify library locations here (add or remove "#" marks to comment/uncomment lines for your platform)
# Linux
DDG_INCLUDE_PATH = -I/usr/include/ -I/usr/local/include -I/usr/include/suitesparse
DDG_LIBRARY_PATH = -L/usr/lib -L/usr/local/lib
DDG_BLAS_LIBS = -llapack -lblas -lgfortran
DDG_SUITESPARSE_LIBS = -lspqr -lcholmod -lmetis -lcolamd -lccolamd -lcamd -lamd -lm
DDG_OPENGL_LIBS = -lglut -lGL -lGLU -lX11
########################################################################################
TARGET = ddg
CC = g++
LD = g++
CFLAGS = -O3 -Wall -Werror -ansi -pedantic $(DDG_INCLUDE_PATH) -I./include -I./src
LFLAGS = -O3 -Wall -Werror -ansi -pedantic $(DDG_LIBRARY_PATH)
LIBS = $(DDG_OPENGL_LIBS) $(DDG_SUITESPARSE_LIBS) $(DDG_BLAS_LIBS)
########################################################################################
## !! Do not edit below this line
HEADERS := $(wildcard include/*.h)
SOURCES := $(wildcard src/*.cpp)
OBJECTS := $(addprefix obj/,$(notdir $(SOURCES:.cpp=.o)))
all: $(TARGET)
$(TARGET): $(OBJECTS)
$(LD) $(OBJECTS) -o $(TARGET) $(CFLAGS) $(LFLAGS) $(LIBS)
obj/%.o: src/%.cpp ${HEADERS}
$(CC) -c $< -o $# $(CFLAGS)
clean:
rm -f $(OBJECTS)
rm -f $(TARGET)
rm -f $(TARGET).exe
Thanks in advance for any help!
It means there is a bug in the code: a header's missing because someone made an assumption.
Your particular toolchain does not satisfy that assumption.
Find the problematic file (you didn't say which it is) and add #include <ostream> to it.
(course/Connection/include/DenseMatrix.h appears to be one such file; there may be others.)
N.B. I must say that, despite the bug, overall this is incredibly good C++ code for a University course. I'm impressed.
Related
I have a makefile that I need to modify to include the path to libraries.I am trying to run program given to me by someone else. I'm really confused on how the makefile works and don't understand what the previous lines are.
These are the directions given to me to modify the makefile:
Change the lines:
INCS = -I"../../LIB/libpca/include"
LIBS = -L"../../LIB/libpca/build" -lpca -larmadillo
in the Makefile to represent the folder where you installed the libpca and armadillo libraries.
Now I now what my new paths are:
Desktop/PCA-CD/Libraries
but I don't understand what is is that I really need to change.
Here is what the makefile looks like:
PROG = CD
UNAME := $(shell uname)
ifeq ($(UNAME), Darwin)
CXX = clang++ -stdlib=libc++
else
CXX = g++
endif
FLAGS = -O0 -g3 -Wall -std=c++0x -pthread
INCS = -I"../../LIB/libpca/include"
LIBS = -L"../../LIB/libpca/build" -lpca -larmadillo
SRCS = CD.cpp
RM = rm -f
all :
$(CXX) $(FLAGS) $(INCS) $(SRCS) $(LIBS) -o $(PROG)
# $(CXX) $(FLAGS) $(SRCS) -o $(PROG)
clean :
$(RM) $(PROG)
Thanks for any help provided.
I think they're suggesting to change the line:
INCS = -I"../../LIB/libpca/include"
LIBS = -L"../../LIB/libpca/build" -lpca -larmadillo
to
INCS = -I"Desktop/PCA-CD/Libraries/include"
LIBS = -L"Desktop/PCA-CD/Libraries/build" -lpca -larmadillo
Notice that Desktop/PCA-CD/Libraries is a relative path, and assumes that the library is stored in the subdirectory of the build directory. From your build directory, try running ls Desktop/PCA-CD/Libraries/build, to confirm it is right path. If it's not, replace it with the absolute path of the directory where you installed the library.
I have read other questions asking similar things, alas I am still confused.
This is my current Makefile:
CC = g++
EXEFILE = template
IFLAGS= -I/usr/include/freetype2 -I../Camera
LFLAGS= -L/usr/lib/nvidia-375 -L/usr/local/lib -L/usr/include/GL -L/usr/local/include/freetype2 -L/usr/local/lib/
LIBS = -lglfw -lGL -lGLU -lOpenGL -lGLEW -pthread -lfreetype
SRC=*.cpp
DEPS=*.h
$(EXEFILE):
$(CC) -std=c++11 -o $(EXEFILE) -Wall -Wno-comment $(SRC) $(IFLAGS) $(LFLAGS) $(LIBS)
all: run clean
run: $(EXEFILE)
./$(EXEFILE)
clean:
rm $(EXEFILE)
Right now all of my .h files and .cpp files are on the working directory, and everything compiles and runs just fine. My issue is that I have already a large number of files, and it is getting quite messy. I want to create multiple directories (and maybe even directories inside these directories) to organize my files. But as soon as I move a header file and it's corresponding cpp file(s) to a directory inside of the current directory the compiler doesn't know how to link them anymore.
How do I tell my make file to compile and link everything under the current root?
Alternatively, is there a ELI5 guide to makefile syntax?
The quickest way to solve your problem is to add SRC and DEPS the files contains in all your sub-directories, something like:
SRC=*.cpp src/*.cpp
DEPS=*.h inc/*.h
Now you may consider writing a rule to first compile every file in a separate directory:
# Group compilation option
CXXFLAGS := -std=c++11 -Wall -Wno-comment $(IFLAGS)
# A directory to store object files (.o)
ODIR := ./objects
# Read this ugly line from the end:
# - grep all the .cpp files in SRC with wildcard
# - add the prefix $(ODIR) to all the file names with addprefix
# - replace .cpp in .o with patsubst
OBJS := $(patsubst %.cpp,%.o,$(addprefix $(ODIR)/,$(wildcard $(SRC)/*.cpp)))
# Compile all the files in object files
# $# refers to the rule name, here $(ODIR)/the_current_file.o
# $< refers to first prerequisite, here $(SRC)/the_current_file.cpp
$(ODIR)/%.o:$(SRC)/%.cpp $(DEPS)/%.h
$(CXX) $(CXXFLAGS) -c -o $# $<
# Finally link everything in the executable
# $^ refers to ALL the prerequisites
$(EXEFILE): $(OBJS)
$(CXX) $(CXXFLAGS) -o $# $^ $(LFLAGS) $(LIBS)
I found a solution, that, to my tastes seems elegant, or at least easy to trace using the wildcard operator. Here is my current makefile:
EXEFILE := $(shell basename $(CURDIR))
DIRECTORIES = $(filter-out ./ ./.%, $(shell find ./ -maxdepth 10 -type d))
IFLAGS= -I/usr/include/freetype2
LOCAL_I_DIRS =$(addprefix -I./, $(DIRECTORIES))
LFLAGS= -L/usr/lib/nvidia-375 -L/usr/local/lib -L/usr/include/GL -L/usr/local/include/freetype2 -L/usr/local/lib/
LIBS = -lglfw -lGL -lGLU -lOpenGL -lGLEW -pthread -lfreetype
SRC := $(wildcard *.cpp) $(wildcard **/*.cpp)
$(EXEFILE): $(EXEFILE).cpp
g++ -std=c++11 -o $(EXEFILE) -Wall -Wno-comment $(SRC) $(IFLAGS) $(LOCAL_I_DIRS) $(LFLAGS) $(LIBS)
all: run clean
run: $(EXEFILE)
./$(EXEFILE)
clean:
rm $(EXEFILE)
print-%: ; #echo $* = $($*)
So I get all directories up to depth 10. I then take out the current root (./) and any hidden directory (./.) leaving me with standard subdirectories stored under "DIRECTORIES", I then add -I to every directory to make it an include directory and store them in LOCAL_I_DIRS
So I can now create as many subdirectories as needed (up to 10 levels) and the compiler will be happy.
I have the makefile given below. When I do make I get the following error
cc -c -o timing.o timing.c
test_c.c:5:17: fatal error: test.h: No such file or directory
#include "test.h"
I have manually verfied that test.h is present in ../include path. I am not sure why this is not finding the header file.It would be great if someone could help.Also I would expect g++ instead of cc
# Makefile template for shared library
CXX = g++ # C++ compiler
CXXFLAGS = -fPIC -Wall -Wextra -O2 -g -I../include #CXX flags
LDFLAGS = -lboost_system -shared # linking flags
RM = rm -f # rm command
TARGET_LIB = libtest.a # target lib
C_SRCS := test_a.c test_b.c
CPP_SRCS := test_c.cpp test_d.cpp
OBJS := $(C_SRCS:.c=.o) $(CPP_SRCS:.cpp=.o)
.PHONY: all
all: ${TARGET_LIB}
$(TARGET_LIB): $(OBJS)
$(CXX) $(CXXFLAGS) ${LDFLAGS} -o $# $^
.PHONY: clean
clean:
-${RM} ${TARGET_LIB} ${OBJS}
~
You have not written a rule for building timing.o from timing.c, so Make uses the default rule it has for that.
But that rule uses CFLAGS, not CXXFLAGS. The CXXFLAGS variable appears in the rule for building object files from C++ sources.
So modify CFLAGS instead of CXXFLAGS, and it should work.
# Compiler to use
CC = g++
# flags to pass compiler
CFLAGS = -ggdb3 -O0 -std=c99 -Wall -Werror
# Name for the executable
EXE = test
# space-separated list of header files
HDRS = simplegui.h globals.h timer.h tile.h gamesprites.h
# space-separated list of libraries, if any,
# each of which should be prefixed with -l
LIBS = -lSDLmain -lSDL -lSDL_image -lSDL_mixer -lSDL_ttf
# space-separated list of source files
SRCS = main.cpp gamesprites.cpp simplegui.cpp tile.cpp timer.cpp
# automatically generated list of object files
OBJS = $(SRCS:.cpp=.o)
# default target
$(EXE): $(OBJS) $(HDRS) Makefile
$(CC) -IC:\SDL-1.2.15\include -LC:\SDL-1.2.15\lib $(CFLAGS) -o $# $(OBJS) $(LIBS)
# dependencies
$(OBJS): $(HDRS) Makefile
It does not work with the makefile. My other approach was:
g++ -IC:\SDL-1.2.15\include -o test main.cpp -LC:\SDL-1.2.15\lib -lSDLmain -lSDL -lSDL_image -lSDL_ttf -lSDL_mixer
It worked initially, I don't know what I changed, no it doesn't work, it keeps telling that it does not find the directory. Previously it did find the directory, but yelled at me about dependencies. I am frustrated cannot find an answer. How do I compile a program that has many .h .cpp files, and that has .h files in other directories? Neither approach I showed, worked... (However I CAN compile the code using my IDE that is configured, but I don't remember how, and I will format my pc soon.
EDIT:
EDIT: Changed \ to /, now I have this:
Not the best solution, but I was a fool. I had "redundant" code, it got fixed when I wrote the following Makefile:
# Compilador a utilizar
CC = g++
# Libraries
LIBS = -lmingw32 -lSDLmain -lSDL -lSDL_image -lSDL_ttf -lSDL_mixer
# Codigo
SRC = main.cpp timer.cpp simplegui.cpp gamesprites.cpp
# Object files
OBJS = $(SRC:.cpp=.o)
# Nombre del ejecutable
EXE = juego_naves
all: $(SRC) $(EXE)
$(OBJS):
g++ -IC:/SDL-1.2.15/include -c $(SRC)
$(EXE): $(OBJS)
g++ -LC:/SDL-1.2.15/lib -o $# $(OBJS) $(LIBS)
clean:
rm -rf *.o $(EXE).exe
I recently lost 5 hours to figure out how I could write the makefile I need. I'm not an informaticien or programmer so I'd like some comments on what I managed to do. I already looked a lot on different sites but still...
I need a makefile that creates different executables: prog1, prog2...
To create the .o files, as I have many files with many dependencies, I don't want to specify them all. So I want/need to use automatic variables with a pattern rule. To speed up the compilation I also take care to only recompile the modified files. I achieved this by using the -MD flag that creates a .d file saved in the $(BUILD) directory.
What I still can't do is to detect automatically which .o files prog1 needs. So for now I have to specify them automatically... If you know how to do that automatically...
I also would like to save the .o files in the $(BUILD) directory, but I can't make it work.
Any advice are welcome !
Thx
CXX = g++
ERRORS = -Wall -Wextra -pedantic
LAPACK = -llapack -lblas
OPTION = -O3 -fopenmp
CXXFLAGS = $(LAPACK) $(ERRORS) $(OPTION)
LDFLAGS = $(LAPACK) $(ERRORS) $(OPTION)
BUILD=build
SRCS=(wildcard *.cpp)
all:prog1 prog2 ...
prog1:prog1.o dep_only_for_prog_1.o dep_for_all_progs.o dep_for_some_progs.o
$(CXX) -o $# $^ $(LDFLAGS) $(NOASSERT)
prog2:prog2.o dep_only_for_prog_2.o dep_for_all_progs.o dep_for_some_progs.o
$(CXX) -o $# $^ $(LDFLAGS) $(NOASSERT)
...
%.o:%.cpp
$(CXX) -MD -c $(CXXFLAGS) $(NOASSERT) $< -o $#
mv $(<:.cpp=.d) $(BUILD)
-include $(addprefix $(BUILD)/$(SRCS:.cpp=.d))
clean:
rm -f *.o $(BUILD)/*
You just can't get make to infer somehow which files belong to which programs, but you CAN make your makefile simpler to read and update. Also you have a few bad things here, such as adding $(LAPACK) (which contains linker flags) to $(CXXFLAGS) (which are passed to the compiler).
Try:
PROGRAMS = prog1 prog2
prog1_SOURCES = prog1.cpp dep_only_for_prog_1.cpp \
dep_for_all_progs.cpp dep_for_some_progs.cpp
prog2_SOURCES = prog2.cpp dep_only_for_prog_2.cpp \
dep_for_all_progs.cpp dep_for_some_progs.cpp
#----- Don't need to change below here
CXX = g++
ERRORS = -Wall -Wextra -pedantic
LAPACK = -llapack -lblas
OPTION = -O3 -fopenmp
CXXFLAGS = $(ERRORS) $(OPTION)
LDFLAGS = $(LAPACK) $(ERRORS) $(OPTION)
BUILD=build
SRCS := $(wildcard *.cpp)
all: $(PROGRAMS)
.SECONDEXPANSION:
$(PROGRAMS): $$($$#_SOURCES:%.cpp=%.o)
$(CXX) -o $# $^ $(LDFLAGS) $(NOASSERT)
%.o : %.cpp
$(CXX) -MD -c $(CXXFLAGS) $(NOASSERT) $< -o $#
mv $(<:.cpp=.d) $(BUILD)
-include $(addprefix $(BUILD)/$(SRCS:.cpp=.d))
clean:
rm -f *.o $(BUILD)/*
Or you can use eval if you want.