I want to create all directories that are needed for object creation. Here is my project structure:
Project/
src/
main.cc
graphics/
window.h
window.cc
math/
vec3.h
vec3.cc
Makefile
And here is my Makefile:
CXX = g++
CXXFLAGS = -Wall -Wno-write-strings -std=c++11
LDLIBS = -lglfw3 -lGLEW -lGLU -lGL -lX11 -lXi -lXrandr -lXxf86vm -lXinerama -lXcursor -lpthread
SRC_DIR = src/ src/graphics/ src/math/
OBJ_DIR = bin
LIB_DIR = -L/usr/lib
INC_DIR = -L/usr/include
SOURCE = $(wildcard $(SRC_DIR)/*.cc)
OBJECTS = ${SOURCE:%.cc=$(OBJ_DIR)/%.o}
EXECUTABLE = application
all: init $(OBJECTS) $(EXECUTABLE)
${EXECUTABLE}: $(OBJECTS)
$(CXX) $(LDFLAGS) $(LIB_DIR) -o $# $(OBJECTS) $(LDLIBS)
$(OBJ_DIR)/%.o: %.cc
$(CXX) $(INC_DIR) -c $< -o $#
init:
#echo $(SRC_DIR)
#echo $(OBJ_DIR)
mkdir -p "$(addprefix $(OBJ_DIR)/,$(SRC_DIR))"
clean:
rm -rf $(OBJ_DIR) $(EXECUTABLE)
I want to create bin, bin/src/, bin/src/graphics and bin/src/math directories.
At the target init I've done mkdir -p "$(OBJ_DIR)/$(SRC_DIR)" but that only creates bin/src src/graphics src/math instead of bin/src bin/src/graphics/ bin/src/math. How can I add bin prefix to those folders that I'm creating?
Use foreach:
init:
$(foreach d, $(SRC_DIR), mkdir -p $(addprefix $(OBJ_DIR)/,$(d));)
Related
I have this makefile:
IDIR = include
SDIR = src
ODIR = obj
BDIR = build
DEPS = $(shell find $(IDIR)/ -name '*.hpp')
SRCS = $(shell find $(SDIR)/ -name '*.cpp')
OBJS = $(patsubst %.cpp,$(ODIR)/%.o,$(notdir $(SRCS)))
BIN = main
CPPC = g++
CFLAGS = -Wall -c
all: dir $(BDIR)/$(BIN)
#echo Finished compiling $(BIN)
dir:
mkdir -p $(BDIR)
mkdir -p $(ODIR)
$(BDIR)/$(BIN): $(OBJS)
$(CPPC) $^ -o $#
$(OBJS): $(SRCS)
$(CPPC) $(CFLAGS) $^ -o $#
clean:
rm -rf $(BDIR) $(ODIR)
When I try to make, I get the following error:
mkdir -p build
mkdir -p obj
g++ -Wall -c src/sdk/tcp/Tcp.cpp src/sdk/socket/Socket.cpp src/Main.cpp -o obj/Tcp.o
g++: fatal error: cannot specify ‘-o’ with ‘-c’, ‘-S’ or ‘-E’ with multiple files
compilation terminated.
make: *** [Makefile:27: obj/Tcp.o] Error 1
My question is, is it possible to achieve what I am trying with this makefile? Going through each source file in $(SRCS), and compile the object file directly inside the obj directory with just the basename. An example of obj directory after a successful compilation:
obj
/ | \
/ | \
Tcp.o Socket.o Main.o
Your $(OBJS) rule is wrong.
There are (at least) two ways to do this.
You could write a pattern rule and use vpath to locate the sources:
vpath %.cpp $(dir $(SRCS))
$(OBJS): obj/%.o: %.cpp
$(CPPC) $(CFLAGS) $^ -o $#
Or you could generate a rule for each object:
define template
$(patsubst %,obj/%.o,$(notdir $(1))): $(addsuffix .cpp,$(1))
echo $(CPPC) $(CFLAGS) $$^ -o $$#
endef
$(foreach src,$(SRCS),$(eval $(call template,$(basename $(src)))))
so I have a project with multiple dependencies of the following structure:
Dependencies
- Glad
- GLFW
- ImGui
Engine
Sandbox
Engine includes the dependencies and Sandbox includes Engine
Project files are generated by premake5.
This compiles and runs perfectly under Windows, but today i tried to port it to linux.
I generated makefiles by using the linux version of premake.
All files do compile successfully, but when the linking process starts i get the following error:
==== Building Sandbox (debug) ====
Linking Sandbox
../Engine/vendor/GLFW/bin/Debug-linux-x86_64/GLFW/libGLFW.a(context.o): In function _glfwRefreshContextAttribs':
/home/netcode/Engine/Engine/vendor/GLFW/src/context.c:361: undefined reference to_glfwPlatformGetTls'
../Engine/vendor/GLFW/bin/Debug-linux-x86_64/GLFW/libGLFW.a(context.o): In function glfwMakeContextCurrent':<br>
/home/netcode/Engine/Engine/vendor/GLFW/src/context.c:614: undefined reference to_glfwPlatformGetTls'
../Engine/vendor/GLFW/bin/Debug-linux-x86_64/GLFW/libGLFW.a(context.o): In function glfwGetCurrentContext':
/home/netcode/Engine/Engine/vendor/GLFW/src/context.c:638: undefined reference to_glfwPlatformGetTls'
../Engine/vendor/GLFW/bin/Debug-linux-x86_64/GLFW/libGLFW.a(context.o): In function glfwSwapInterval':
/home/netcode/Engine/Engine/vendor/GLFW/src/context.c:664: undefined reference to_glfwPlatformGetTls'
../Engine/vendor/GLFW/bin/Debug-linux-x86_64/GLFW/libGLFW.a(context.o): In function glfwExtensionSupported':
/home/netcode/Engine/Engine/vendor/GLFW/src/context.c:682: undefined reference to_glfwPlatformGetTls'...
and so on...
this is the final makefile:
# Alternative GNU Make project makefile autogenerated by Premake
ifndef config
config=debug
endif
ifndef verbose
SILENT = #
endif
.PHONY: clean prebuild
SHELLTYPE := posix
ifeq (.exe,$(findstring .exe,$(ComSpec)))
SHELLTYPE := msdos
endif
# Configurations
# #############################################
RESCOMP = windres
INCLUDES += -I../Engine/vendor/spdlog/include -I../Engine/src -I../Engine/vendor -I../Engine/vendor/glm -Isrc
FORCE_INCLUDE +=
ALL_CPPFLAGS += $(CPPFLAGS) -MMD -MP $(DEFINES) $(INCLUDES)
ALL_RESFLAGS += $(RESFLAGS) $(DEFINES) $(INCLUDES)
LINKCMD = $(CXX) -o "$#" $(OBJECTS) $(RESOURCES) $(ALL_LDFLAGS) $(LIBS)
define PREBUILDCMDS
endef
define PRELINKCMDS
endef
define POSTBUILDCMDS
endef
ifeq ($(config),debug)
TARGETDIR = ../bin/Debug-linux-x86_64/Sandbox
TARGET = $(TARGETDIR)/Sandbox
OBJDIR = ../bin-int/Debug-linux-x86_64/Sandbox
DEFINES += -DENGINE_DEBUG
ALL_CFLAGS += $(CFLAGS) $(ALL_CPPFLAGS) -m64 -g
ALL_CXXFLAGS += $(CXXFLAGS) $(ALL_CPPFLAGS) -m64 -g -std=c++17
LIBS += ../bin/Debug-linux-x86_64/Engine/libEngine.a ../Engine/vendor/GLFW/bin/Debug-linux-x86_64/GLFW/libGLFW.a ../Engine/vendor/Glad/bin/Debug-linux-x86_64/Glad/libGlad.a ../Engine/vendor/imgui/bin/Debug-linux-x86_64/ImGui/libImGui.a -lXrandr -lXi -lGLEW -lGLU -lGL -lX11 -ldl -lpthread -lstdc++fs
LDDEPS += ../bin/Debug-linux-x86_64/Engine/libEngine.a ../Engine/vendor/GLFW/bin/Debug-linux-x86_64/GLFW/libGLFW.a ../Engine/vendor/Glad/bin/Debug-linux-x86_64/Glad/libGlad.a ../Engine/vendor/imgui/bin/Debug-linux-x86_64/ImGui/libImGui.a
ALL_LDFLAGS += $(LDFLAGS) -L/usr/lib64 -m64
else ifeq ($(config),release)
TARGETDIR = ../bin/Release-linux-x86_64/Sandbox
TARGET = $(TARGETDIR)/Sandbox
OBJDIR = ../bin-int/Release-linux-x86_64/Sandbox
DEFINES += -DENGINE_RELEASE
ALL_CFLAGS += $(CFLAGS) $(ALL_CPPFLAGS) -m64 -O2
ALL_CXXFLAGS += $(CXXFLAGS) $(ALL_CPPFLAGS) -m64 -O2 -std=c++17
LIBS += ../bin/Release-linux-x86_64/Engine/libEngine.a ../Engine/vendor/GLFW/bin/Release-linux-x86_64/GLFW/libGLFW.a ../Engine/vendor/Glad/bin/Release-linux-x86_64/Glad/libGlad.a ../Engine/vendor/imgui/bin/Release-linux-x86_64/ImGui/libImGui.a -lXrandr -lXi -lGLEW -lGLU -lGL -lX11 -ldl -lpthread -lstdc++fs
LDDEPS += ../bin/Release-linux-x86_64/Engine/libEngine.a ../Engine/vendor/GLFW/bin/Release-linux-x86_64/GLFW/libGLFW.a ../Engine/vendor/Glad/bin/Release-linux-x86_64/Glad/libGlad.a ../Engine/vendor/imgui/bin/Release-linux-x86_64/ImGui/libImGui.a
ALL_LDFLAGS += $(LDFLAGS) -L/usr/lib64 -m64 -s
else ifeq ($(config),dist)
TARGETDIR = ../bin/Dist-linux-x86_64/Sandbox
TARGET = $(TARGETDIR)/Sandbox
OBJDIR = ../bin-int/Dist-linux-x86_64/Sandbox
DEFINES += -DENGINE_DIST
ALL_CFLAGS += $(CFLAGS) $(ALL_CPPFLAGS) -m64 -O2
ALL_CXXFLAGS += $(CXXFLAGS) $(ALL_CPPFLAGS) -m64 -O2 -std=c++17
LIBS += ../bin/Dist-linux-x86_64/Engine/libEngine.a ../Engine/vendor/GLFW/bin/Dist-linux-x86_64/GLFW/libGLFW.a ../Engine/vendor/Glad/bin/Dist-linux-x86_64/Glad/libGlad.a ../Engine/vendor/imgui/bin/Dist-linux-x86_64/ImGui/libImGui.a -lXrandr -lXi -lGLEW -lGLU -lGL -lX11 -ldl -lpthread -lstdc++fs
LDDEPS += ../bin/Dist-linux-x86_64/Engine/libEngine.a ../Engine/vendor/GLFW/bin/Dist-linux-x86_64/GLFW/libGLFW.a ../Engine/vendor/Glad/bin/Dist-linux-x86_64/Glad/libGlad.a ../Engine/vendor/imgui/bin/Dist-linux-x86_64/ImGui/libImGui.a
ALL_LDFLAGS += $(LDFLAGS) -L/usr/lib64 -m64 -s
else
$(error "invalid configuration $(config)")
endif
# Per File Configurations
# #############################################
# File sets
# #############################################
OBJECTS :=
OBJECTS += $(OBJDIR)/Sandbox2D.o
OBJECTS += $(OBJDIR)/SandboxApp.o
# Rules
# #############################################
all: $(TARGET)
#:
$(TARGET): $(OBJECTS) $(LDDEPS) | $(TARGETDIR)
$(PRELINKCMDS)
#echo Linking Sandbox
$(SILENT) $(LINKCMD)
$(POSTBUILDCMDS)
$(TARGETDIR):
#echo Creating $(TARGETDIR)
ifeq (posix,$(SHELLTYPE))
$(SILENT) mkdir -p $(TARGETDIR)
else
$(SILENT) mkdir $(subst /,\\,$(TARGETDIR))
endif
$(OBJDIR):
#echo Creating $(OBJDIR)
ifeq (posix,$(SHELLTYPE))
$(SILENT) mkdir -p $(OBJDIR)
else
$(SILENT) mkdir $(subst /,\\,$(OBJDIR))
endif
clean:
#echo Cleaning Sandbox
ifeq (posix,$(SHELLTYPE))
$(SILENT) rm -f $(TARGET)
$(SILENT) rm -rf $(OBJDIR)
else
$(SILENT) if exist $(subst /,\\,$(TARGET)) del $(subst /,\\,$(TARGET))
$(SILENT) if exist $(subst /,\\,$(OBJDIR)) rmdir /s /q $(subst /,\\,$(OBJDIR))
endif
prebuild: | $(OBJDIR)
$(PREBUILDCMDS)
ifneq (,$(PCH))
$(OBJECTS): $(GCH) | $(PCH_PLACEHOLDER)
$(GCH): $(PCH) | prebuild
#echo $(notdir $<)
$(SILENT) $(CXX) -x c++-header $(ALL_CXXFLAGS) -o "$#" -MF "$(#:%.gch=%.d)" -c "$<"
$(PCH_PLACEHOLDER): $(GCH) | $(OBJDIR)
ifeq (posix,$(SHELLTYPE))
$(SILENT) touch "$#"
else
$(SILENT) echo $null >> "$#"
endif
else
$(OBJECTS): | prebuild
endif
# File Rules
# #############################################
$(OBJDIR)/Sandbox2D.o: src/Sandbox2D.cpp
#echo $(notdir $<)
$(SILENT) $(CXX) $(ALL_CXXFLAGS) $(FORCE_INCLUDE) -o "$#" -MF "$(#:%.o=%.d)" -c "$<"
$(OBJDIR)/SandboxApp.o: src/SandboxApp.cpp
#echo $(notdir $<)
$(SILENT) $(CXX) $(ALL_CXXFLAGS) $(FORCE_INCLUDE) -o "$#" -MF "$(#:%.o=%.d)" -c "$<"
-include $(OBJECTS:%.o=%.d)
ifneq (,$(PCH))
-include $(PCH_PLACEHOLDER).d
endif
any guesses?
I'm trying to get dlib library working in my C++ project from last 2 weeks and found some solution but still i'm facing errors which i can not understand. As i am newbie to the makefile and dlib guide me what to do with makefile.
The folder structure is like this:
projectDir
|-makefile
|-src
|-CDetector.cpp
|-CDetectot.h
|-CStreamReader.cpp
|-CStreamReader.h
|-include
|-darknet
|-(files).h (other .h files needed by src files)
|-dlib-19.6
|-all
|-source.cpp
|-lots of header files
|-...
|-external_libs
|-libdarknet.a
|-libdarknet.so
The makefile looks like this:
EXE = darknet
OBJ_DIR = obj
CXXFILES = $(shell find src -type f -name '*.cpp')
CXXOBJ = $(patsubst src/%.cpp,obj/%.o,$(CXXFILES))
INCLUDE = -I/include -I/include/darknet
LIBS = external_libs/libdarknet.a
CXXFLAGS = `pkg-config --cflags-only-I opencv` -Wall -Wno-unknown-pragmas -Wfatal-errors -Wwrite-strings -fPIC
LDFLAGS = -lm -pthread -lX11 -DDLIB_JPEG_SUPPORT -ljpeg
all: $(EXE)
$(EXE): $(CXXOBJ)
$(CXX) $(CXXOBJ) -o $(EXE) $(LIBS) $(LDFLAGS)
$(OBJ_DIR)/%.o: src/%.cpp
$(CXX) $(CXXFLAGS) $(INCLUDE) $< -c -o $#
$(BUILD)
run: all
./$(EXE)
clean:
-rm -f $(EXE) $(CXXOBJ)
rmdir obj/
It needs some modification as INCLUDE, CXXFLAGS AND LDFLAGS will be
INCLUDE = -Iinclude -Iinclude/darknet `pkg-config --cflags-only-I opencv`
CXXFLAGS = -Wall -Wno-unknown-pragmas -Wfatal-errors -Wwrite-strings -fPIC
LDFLAGS = -lm -pthread -lX11 -DDLIB_JPEG_SUPPORT -ljpeg -lopencv_videoio `pkg-config --libs opencv`
and i'm now using darknet makefile to do it so my makefile looks like
VPATH = ./src/
ALIB = external_libs/libdarknet.a
EXEC = darknet
OBJDIR = ./obj/
CC = g++ -std=c++11
NVCC = nvcc
AR = ar
ARFLAGS = rcs
OPTS = -Ofast
LDFLAGS = -lm -pthread -lX11 -DDLIB_JPEG_SUPPORT -ljpeg -lopencv_videoio `pkg-config --libs opencv`
INCLUDE = -Iinclude -Iinclude/darknet `pkg-config --cflags-only-I opencv`
CFLAGS = -Wall -Wno-unknown-pragmas -Wfatal-errors -Wwrite-strings -fPIC
OBJ = CDetector.o CStreamReader.o
EXECOBJA = CDetector.o CStreamReader.o
EXECOBJ = $(addprefix $(OBJDIR), $(EXECOBJA))
OBJS = $(addprefix $(OBJDIR), $(OBJ))
DEPS = $(wildcard src/*.h) Makefile include/darknet/darknet.h
all: obj results $(ALIB) $(EXEC)
$(EXEC): $(EXECOBJ) $(ALIB)
$(CC) $(INCLUDE) $(CFLAGS) $^ -o $# $(LDFLAGS) $(ALIB)
$(ALIB): $(OBJS)
$(AR) $(ARFLAGS) $# $^
$(OBJDIR)%.o: %.cpp $(DEPS)
$(CC) $(INCLUDE) $(CFLAGS) -c $< -o $#
obj:
mkdir -p obj
backup:
mkdir -p backup
results:
mkdir -p results
.PHONY: clean
clean:
rm -rf $(OBJS) $(ALIB) $(EXEC) $(EXECOBJ)
I have a C++ project with the following structure:
/Project
Makefile
/src (.cpp source files)
...
/include (.h header files)
...
/libs
...
/build (.o object files)
...
/tests (target .cpp files I want to compile)
test1.cpp
test2.cpp
test3.cpp
...
/bin (output directory for compiled files)
...
For the tests inside my test file, I would like to be able to
Compile them individually, e.g. "make test1", "make test2"
Compile them all at once
But I would like to be able to do this without needing to define new variables (e.g. TARGET1, TARGET2,...) for each new test file, nor add a bunch of new lines to my makefile for each new test file.
For example, right now I have something like:
CXX = g++
SRC_DIR = ./src
BUILD_DIR = ./build
LIB = -I libs
INC = -I include
SRCS = $(shell find $(SRC_DIR) -type f -name *.cpp)
OBJS = $(patsubst $(SRC_DIR)/%, $(BUILD_DIR)/%, $(SRCS:.cpp=.o))
TARGET1 ?= test1.cpp
TARGET2 ?= test2.cpp
TARGET3 ?= test3.cpp
all: $(OBJS)
$(CXX) ./tests/$(TARGET1).cpp $(LIB) $(INC) $^ -o ./bin/$(TARGET1)
$(CXX) ./tests/$(TARGET2).cpp $(LIB) $(INC) $^ -o ./bin/$(TARGET2)
$(CXX) ./tests/$(TARGET3).cpp $(LIB) $(INC) $^ -o ./bin/$(TARGET3)
$(TARGET1): $(OBJS)
$(CXX) ./tests/$(TARGET1).cpp $(LIB) $(INC) $^ -o ./bin/$(TARGET1)
$(TARGET2): $(OBJS)
$(CXX) ./tests/$(TARGET2).cpp $(LIB) $(INC) $^ -o ./bin/$(TARGET2)
$(TARGET3): $(OBJS)
$(CXX) ./tests/$(TARGET3).cpp $(LIB) $(INC) $^ -o ./bin/$(TARGET3)
$(BUILD_DIR)/%.o: $(SRC_DIR)/%.cpp
$(CXX) $(INC) -c -o $# $<
which does the job, but isn't very scalable. How could I do this scalably?
Make has some more tricks that you can use (not tested):
CXX = g++
SRC_DIR = src
BUILD_DIR = build
TEST_DIR = tests
BIN_DIR = bin
LIB = -I libs
INC = -I include
SRCS = $(wildcard $(SRC_DIR)/*.cpp)
OBJS = $(patsubst $(SRC_DIR)/%.cpp,$(BUILD_DIR)/%.o,$(SRCS))
TESTS = $(wildcard $(TEST_DIR)/*.cpp)
TARGETS = $(patsubst $(TEST_DIR)/%.cpp,$(BIN_DIR)/%,$(TESTS))
all: $(TARGETS)
$(TARGETS): $(BIN_DIR)/%: $(OBJS)
$(CXX) $(TEST_DIR)/$*.cpp $(LIB) $(INC) $^ -o $#
$(BUILD_DIR)/%.o: $(SRC_DIR)/%.cpp
$(CXX) $(INC) -c -o $# $<
The main trick here is the static pattern rule for $(TARGETS): in the recipe $* expands as the stem of the pattern. The other tricks are a simpler use of patsubst and the use of wildcard instead of the less efficient shell find. Note that this last one works only if your source files are flat in src, not if they are organized in a hierarchy of sub-directories.
But this does not answer your most tricky request: a way to invoke make testX instead of make bin/testX. So, here is the most tricky part:
SHORTERTARGETS = $(patsubst $(TEST_DIR)/%.cpp,%,$(TESTS))
.PHONY: $(SHORTERTARGETS)
# $(1): short target
define TARGETS_rule
$(1): $(BIN_DIR)/$(1)
endef
$(foreach t,$(SHORTERTARGETS),$(eval $(call TARGETS_rule,$(t))))
You can even use this foreach-eval-call to factorize other parts of your Makefile:
CXX = g++
SRC_DIR = src
BUILD_DIR = build
TEST_DIR = tests
BIN_DIR = bin
LIB = -I libs
INC = -I include
SRCS = $(wildcard $(SRC_DIR)/*.cpp)
OBJS = $(patsubst $(SRC_DIR)/%.cpp,$(BUILD_DIR)/%.o,$(SRCS))
TESTS = $(wildcard $(TEST_DIR)/*.cpp)
TARGETS = $(patsubst $(TEST_DIR)/%.cpp,$(BIN_DIR)/%,$(TESTS))
SHORTERTARGETS = $(patsubst $(TEST_DIR)/%.cpp,%,$(TESTS))
.PHONY: all $(SHORTERTARGETS)
all: $(TARGETS)
$(BUILD_DIR)/%.o: $(SRC_DIR)/%.cpp
$(CXX) $(INC) -c -o $# $<
# $(1): short target
define TARGETS_rule
$(1): $(BIN_DIR)/$(1)
$(BIN_DIR)/$(1): $(OBJS)
$(CXX) $(TEST_DIR)/$(1).cpp $(LIB) $(INC) $$^ -o $$#
endef
$(foreach t,$(SHORTERTARGETS),$(eval $(call TARGETS_rule,$(t))))
The most difficult to understand in this last version is the need of $$in the recipe (double expansion). But here the GNU make manual is your friend.
I am trying to build excutables for multiple files which are built in the same way. When i run make all the excutables should be generated. I am getting error at prerequisites part of the macro.
CXX = g++
CXX_FLAGS = -g -Wall
LD_FLAGS =
INC_DIR = -I/my/path/include
SRC_DIR = .
LIB_DIR = -L$/my/path/lib
OBJ_DIR = obj
EXE_DIR = exe
SRCS := $(foreach s_dir, $(SRC_DIR), $(wildcard $(s_dir)/*.cpp))
OBJS := $(patsubst $(SRC_DIR)/%.cpp, $(OBJ_DIR)/%.o, $(SRCS))
EXES := $(patsubst $(SRC_DIR)/%.cpp, $(EXE_DIR)/%.out, $(SRCS))
all: create_directories create_objects create_exes
create_directories:
#echo "Creating $(OBJ_DIR) and $(EXE_DIR)..."
#mkdir -p obj
#mkdir -p exe
create_objects:
$(foreach b_dir, $(OBJ_DIR), $(eval $(call build-objects, $(b_dir))))
create_exes:
$(foreach ot, $(EXE_DIR), $(eval $(call build-exes, $(ot))))
define build-objects
$1/%.o: %.cpp
$(CXX) $(CXX_FLAGS) $(INC_DIR) -MMD -MP -c $$< -o $$#
endef
define build-exes
$1/%.out:obj/%.o
$(CXX) $(LD_FLAGS) -o $# $(OBJS) $(LIB_DIR) -lmylib
endef
Is this a right way to do generate multiple exes or any other simple way?
If I'm reading this makefile right, then it's much too complicated.
First let's have a rule to build object files:
$(OBJ_DIR)/%.o: %.cpp
$(CXX) $(CXX_FLAGS) $(INC_DIR) -MMD -MP -c $< -o $#
Now if we're not sure about the existence of obj/, we could add a rule to create it, but for the moment let's just put in a failsafe (we'll come back to this later):
$(OBJ_DIR)/%.o: %.cpp
#mkdir -p $(OBJ_DIR)
$(CXX) $(CXX_FLAGS) $(INC_DIR) -MMD -MP -c $< -o $#
And a similar rule to build the executables:
$(EXE_DIR)/%.out: $(OBJ_DIR)/%.o
#mkdir -p $(EXE_DIR)
$(CXX) $(LD_FLAGS) -o $# $^ $(LIB_DIR) -lmylib
And finally (at the top) some variables, the lists of files, and the all rule:
CXX = g++
CXX_FLAGS = -g -Wall
LD_FLAGS =
INC_DIR = -I/my/path/include
SRC_DIR = .
LIB_DIR = -L$/my/path/lib
OBJ_DIR = obj
EXE_DIR = exe
SRCS := $(wildcard $(SRC_DIR)/*.cpp)
EXES := $(patsubst $(SRC_DIR)/%.cpp, $(EXE_DIR)/%.out, $(SRCS))
# Let the object files take care of themselves
all: $(EXES)
That's all you need. Once this is working perfectly, we can discuss refinements like rules for building directories.