I'm trying to create makefile with following content:
$(CXX)=g++
$(SRC)=../src
$(INCL)=../include
all: cpu ram temperature swap statusshooter
$(CXX) main.cpp cpu.o ram.o temperature.o swap.o statusshooter.o -o main.o -I$(INCL) -Ofast -Wall -lyaml-cpp -lglog -lpqxx -lpq
cpu:
$(CXX) -c $(SRC)/CCpu.cpp -o cpu.o -Ofast -Wall
ram:
$(CXX) -c $(SRC)/CRam.cpp -o ram.o -Ofast -Wall
temperature:
$(CXX) -c $(SRC)/CTemperature.cpp -o temperature.o -Ofast -Wall
swap:
$(CXX) -c $(SRC)/CSwap.cpp -o swap.o -Ofast -Wall
statusshooter:
$(CXX) -c $(SRC)/CStatusShooter.cpp -o statusshooter.o -Ofast -Wall
Executing that makefile with:
make CXX=g++-4.7 throws following error:
makefile:2: *** empty variable name. Stop.
How to resolve this?
The syntax $(CXX) is for evaluating a make variable, not assigning to it. You want
CXX = g++
SRC = ../src
INCL = ../include
[...]
To assign value to variable write var=..., not $var=..., so, in your case,
CXX=g++ etc.
Related
After try to use this attached makefile the error that appears is :
(.text+0x20): undefined reference to `main'
collect2: error: ld returned 1 exit status
make: *** [Ass1F] Error 1
the makefile is :
all: Ass1F
Ass1F: bin/main.o bin/x.o bin/y.o bin/z.o bin/w.o
g++ -o bin/main.o bin/x.o bin/y.o bin/z.o bin/w.o
#echo 'Finished building target: Ass1F'
#echo ' '
bin/x.o: src/x.cpp
g++ -g -Wall -Weffc++ -c -Linclude -o bin/x.o src/x.cpp
bin/y.o: src/y.cpp
g++ -g -Wall -Weffc++ -c -Linclude -o bin/y.o src/y.cpp
bin/z.o: src/z.cpp
g++ -g -Wall -Weffc++ -c -Linclude -o bin/z.o src/z.cpp
bin/w.o: src/w.cpp
g++ -g -Wall -Weffc++ -c -Linclude -o bin/w.o src/w.cpp
bin/main.o: src/main.cpp
g++ -g -Wall -Weffc++ -c -Linclude -o bin/main.o src/main.cpp
clean:
rm -f bin/*
what should I do with this problem?
the reason is the makefile or something in the code?
just to let you know we used eclipse to write the code and everything work perfectly- no any bugs.
thanks
Line g++ -o bin/main.o bin/x.o bin/y.o bin/z.o bin/w.o tries to create executable named bin/main.o, overwriting its previous contents.
It should be e.g. g++ -o Ass1F bin/main.o bin/x.o bin/y.o bin/z.o bin/w.o
Your makefile recipe for Ass1F is incorrect, it doesn't specify the output file, os make uses bin/main.o as the output file instead of one of the input files.
You can simplify the makefile by using pattern rules (i.e. with wildcards) and using pre-defined variables such as $# (the name of the target) and $^ (the list of prerequisites) and CXX (the C++ compiler):
CXXFLAGS = -g -Wall -Weffc++
CPPFLAGS =
LDFLAGS =
LDLIBS =
all: Ass1F
Ass1F: bin/main.o bin/x.o bin/y.o bin/z.o bin/w.o
$(CXX) $(LDFLAGS) -o $# $^ $(LDLIBS)
#echo 'Finished building target: Ass1F'
#echo ' '
bin/%.o: src/%.cpp
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c -o $# $^
clean:
rm -f bin/*
I currently have a problem with a C++ project I have. I need some tools provided with C++11 but when I want to compile with a Makefile, I have the error :
error This file requires compiler and library support for the ISO C++ 2011 standard. This support is currently experimental, and must be enabled with the -std=c++11 or -std=gnu++11 compiler options.
Here is my Makefile :
.PHONY: clean, mrproper
# var
CXX = g++
EXEC = tablut
LDFLAGS =
CXXFLAGS = -std=c++11 -Wall -Wextra
SRC= partie.cpp pawn.cpp playground.cpp
OBJ= $(SRC:.c=.o)
# commands
all: $(EXEC)
tablut: $(OBJ)
$(CXX) -o tablut $(OBJ) $(LDFLAGS)
%.o: %.cpp
$(CXX) -o $# -c $< $(CXXFLAGS)
clean:
rm -rf *.o
mrproper: clean
rm -rf tablut
The funny thing is that my code compile if I enter the command g++ -c std=c++11 ...
What did I do wrong ?
NB : I tried with the flags -std=c++11, -std=c++0x and -std=gnu++11
You have the rule:
OBJ= $(SRC:.c=.o)
Which means that $(OBJ) ends up being:
OBJ= partie.cpp pawn.cpp playground.cpp
Because none of them match .c. You probably mean to write:
OBJ= $(SRC:.cpp=.o)
With that fix, running make produces:
$ make
g++ -o partie.o -c partie.cpp -std=c++11 -Wall -Wextra
g++ -o pawn.o -c pawn.cpp -std=c++11 -Wall -Wextra
g++ -o playground.o -c playground.cpp -std=c++11 -Wall -Wextra
g++ -o tablut partie.o pawn.o playground.o
Which is probably what you wanted.
Following makefile works except cleaning the object files after compiling and linking. I tried make clean which does exactly what I want: deletes the executable and the object files in all folders. I also included the outputs of make and make clean. Any idea?
Makefile:
CC=g++
CFLAGS=-c -std=c++11 -O2 -O3
SOURCES=main.cpp\
BoundaryConditions/BoundaryConditions.cpp\
Cell/Cell.cpp\
Face/Face.cpp\
Formulation/Explicit/Explicit.cpp\
Formulation/Implicit/Implicit.cpp\
Grid/Grid.cpp\
Grid/ReadGrid.cpp\
Grid/SetGrid.cpp\
Init/Init.cpp\
InterFlux/Interflux.cpp\
InterFlux/Roe/Roe.cpp\
Matrix5/Operators.cpp\
Output/Output.cpp\
Solver/GaussSeidel.cpp\
Vector/Vector.cpp
OBJECTS=$(SOURCES:.cpp=.o)
EXECUTABLE=codeBaku
all: $(SOURCES) $(EXECUTABLE)
$(EXECUTABLE): $(OBJECTS)
$(CC) $(LDFLAGS) $(OBJECTS) -o $#
.cpp.o:
$(CC) $(CFLAGS) $< -o $#
.PHONY: clean
clean:
rm -rf $(OBJECTS) $(EXECUTABLE)
Output of make:
g++ -c -std=c++11 -O2 -O3 main.cpp -o main.o
g++ -c -std=c++11 -O2 -O3 BoundaryConditions/BoundaryConditions.cpp -o BoundaryConditions/BoundaryConditions.o
g++ -c -std=c++11 -O2 -O3 Cell/Cell.cpp -o Cell/Cell.o
g++ -c -std=c++11 -O2 -O3 Face/Face.cpp -o Face/Face.o
g++ -c -std=c++11 -O2 -O3 Formulation/Explicit/Explicit.cpp -o Formulation/Explicit/Explicit.o
g++ -c -std=c++11 -O2 -O3 Formulation/Implicit/Implicit.cpp -o Formulation/Implicit/Implicit.o
g++ -c -std=c++11 -O2 -O3 Grid/Grid.cpp -o Grid/Grid.o
g++ -c -std=c++11 -O2 -O3 Grid/ReadGrid.cpp -o Grid/ReadGrid.o
g++ -c -std=c++11 -O2 -O3 Grid/SetGrid.cpp -o Grid/SetGrid.o
g++ -c -std=c++11 -O2 -O3 Init/Init.cpp -o Init/Init.o
g++ -c -std=c++11 -O2 -O3 InterFlux/Interflux.cpp -o InterFlux/Interflux.o
g++ -c -std=c++11 -O2 -O3 InterFlux/Roe/Roe.cpp -o InterFlux/Roe/Roe.o
g++ -c -std=c++11 -O2 -O3 Matrix5/Operators.cpp -o Matrix5/Operators.o
g++ -c -std=c++11 -O2 -O3 Output/Output.cpp -o Output/Output.o
g++ -c -std=c++11 -O2 -O3 Solver/GaussSeidel.cpp -o Solver/GaussSeidel.o
g++ -c -std=c++11 -O2 -O3 Vector/Vector.cpp -o Vector/Vector.o
g++ main.o BoundaryConditions/BoundaryConditions.o Cell/Cell.o Face/Face.o Formulation/Explicit/Explicit.o Formulation/Implicit/Implicit.o Grid/Grid.o Grid/ReadGrid.o Grid/SetGrid.o Init/Init.o InterFlux/Interflux.o InterFlux/Roe/Roe.o Matrix5/Operators.o Output/Output.o Solver/GaussSeidel.o Vector/Vector.o -o codeBaku
Output of make clean:
rm -rf main.o BoundaryConditions/BoundaryConditions.o Cell/Cell.o Face/Face.o Formulation/Explicit/Explicit.o Formulation/Implicit/Implicit.o Grid/Grid.o Grid/ReadGrid.o Grid/SetGrid.o Init/Init.o InterFlux/Interflux.o InterFlux/Roe/Roe.o Matrix5/Operators.o Output/Output.o Solver/GaussSeidel.o Vector/Vector.o codeBaku
It is unusual to automatically remove the object files, since that would mean everything would have to be recompiled each time, even if you only change one source file. However, if you really want to do it, you could do something like this:
all: $(SOURCES) $(EXECUTABLE)
rm $(OBJECTS)
I'm trying to compile my project using a Makefile, but somehow the -fopenmp flag won't work.
Here's the Makefile:
TARGET=isaac
CC=g++
CFLAGS=-Wall -O2 -fopenmp
LDFLAGS=-lm -lpthread -lrt
OBJ=src/main.o src/bhtree.o src/body.o src/configreader.o src/diagnostics.o src/output.o src/quad.o src/timing.o src/vector2.o
isaac: $(OBJ)
$(CC) $(CFLAGS) -o $(TARGET) $(OBJ) $(LDFLAGS)
%.o: src/%.cpp
$(CC) $(CFLAGS) -c $<
clean:
rm src/*.o src/*~ isaac
and here is the output when calling "make"
g++ -c -o src/main.o src/main.cpp
g++ -c -o src/bhtree.o src/bhtree.cpp
g++ -c -o src/body.o src/body.cpp
g++ -c -o src/configreader.o src/configreader.cpp
g++ -c -o src/diagnostics.o src/diagnostics.cpp
g++ -c -o src/output.o src/output.cpp
g++ -c -o src/quad.o src/quad.cpp
g++ -c -o src/timing.o src/timing.cpp
g++ -c -o src/vector2.o src/vector2.cpp
g++ -Wall -O2 -fopenmp -o isaac src/main.o src/bhtree.o src/body.o src/configreader.o src/diagnostics.o src/output.o src/quad.o src/timing.o src/vector2.o -lm -lpthread -lrt
the -fopenmp flag is missing when the source files are compiled, so the finished executable is serial, not parallel.
How can I fix this?
The problem is that your rule does not apply at all. You are free to remove
%.o: src/%.cpp
$(CC) $(CFLAGS) -c $<
and you'll get the same result as before. That's because some predefined rule is used instead of yours (I'm not great makefile expert though).
The core of the problem is that your rule is for ./*.o files, but you need ./src/*.o for isaac. You can change your rule
src/%.o: src/%.cpp
$(CC) $(CFLAGS) -c $<
Or (better) move all autogenerated staff somewhere from src.
I got a C++ program for which someone else made a make file. I want to compile the program with flag -g, but I don't know where to add it. Below is the make file.
CC = g++
LOADLIBES = -lm
CFLAGS = -Wall -O2
SRC1 = Agent.cpp Breeder.cpp CandidateSolution.cpp \
Cupid.cpp FateAgent.cpp Grid.cpp Reaper.cpp \
fitness.cpp
SRC2 = main.cpp
SRC = $(SRC1) $(SRC2)
OBJS = $(SRC1:.cpp = .o)
AUX = $(SRC1:.c = .h)
main: $(OBJS)
# $(CC) $(CFLAGS) -o $(SRC) $(AUX)
.PHONY: clean
clean:
rm -f *.o main
Where should I add that I want to use -g?
$(CC) is used for compiling C programs. $(CXX) is used for compiling C++ programs. Similarly $(CFLAGS) is used for C programs, $(CXXFLAGS) is used for compiling C++.
Change the first few lines to this:
#CC = g++
LOADLIBES = -lm
CXXFLAGS = -Wall -O2 -g
(But see others' notes about incompatibilities between -O2 and -g.)
Get rid of the spaces inside the parentheses in this line:
OBJS = $(SRC1:.cpp=.o)
Change the main lines to this:
main: $(OBJS) $(SRC2)
# Built by implicit rules
The resulting makefile should look like this:
#CC = g++
LOADLIBES = -lm
CXXFLAGS = -Wall -O2 -g
SRC1 = Agent.cpp Breeder.cpp CandidateSolution.cpp \
Cupid.cpp FateAgent.cpp Grid.cpp Reaper.cpp \
fitness.cpp
SRC2 = main.cpp
SRC = $(SRC1) $(SRC2)
OBJS = $(SRC1:.cpp=.o)
AUX = $(SRC1:.c=.h)
main: $(OBJS) $(SRC2)
# Built by implicit rules
.PHONY: clean
clean:
rm -f *.o main
and the output should look like this:
$ make
g++ -Wall -O2 -g -c -o Agent.o Agent.cpp
g++ -Wall -O2 -g -c -o Breeder.o Breeder.cpp
g++ -Wall -O2 -g -c -o CandidateSolution.o CandidateSolution.cpp
g++ -Wall -O2 -g -c -o Cupid.o Cupid.cpp
g++ -Wall -O2 -g -c -o FateAgent.o FateAgent.cpp
g++ -Wall -O2 -g -c -o Grid.o Grid.cpp
g++ -Wall -O2 -g -c -o Reaper.o Reaper.cpp
g++ -Wall -O2 -g -c -o fitness.o fitness.cpp
g++ -Wall -O2 -g main.cpp Agent.o Breeder.o CandidateSolution.o Cupid.o FateAgent.o Grid.o Reaper.o fitness.o -lm -o main
For completeness, this is the version of make I am using on Ubuntu 10.04:
$ make -v
GNU Make 3.81
Copyright (C) 2006 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.
This program built for i486-pc-linux-gnu
You need to uncomment the line:
# $(CC) $(CFLAGS) -o $(SRC) $(AUX)
(remove the hash sigh):
$(CC) $(CFLAGS) -o $(SRC) $(AUX)
And change
CFLAGS = -Wall -O2
to
CFLAGS = -Wall -O2 -g
But you may find debugging easier if you disable optimization by removing -O2:
CFLAGS = -Wall -g