Understanding a Makefile with automatic dependencies: Problems with 'sed' part - regex

Question

I have followed this tutorial. It explains the making of Makefile which take care of dependencies. I have made the following Makefile which works according to the following directory structure:
folder--|Makefile
|src----|(all .c and .h files here)
|obj----|(all objects file are made here)
|bin----|(target is made here)
The Makefile is:
TARGET = exec
CC = gcc
CFLAGS = -g -I.
LINKER = gcc -o
LFLAGS = -I. -lm -lpthread
BINDIR = bin
OBJDIR = obj
SRCDIR = src
INTERFACE = interface
STD = -std=c99
PROGRAMSOURCES := $(wildcard $(SRCDIR)/*.c)
PROGRAMINTERFACE:= $(wildcard $(INTERFACE)/*.h)
OBJECTS := $(PROGRAMSOURCES:$(SRCDIR)/%.c=$(OBJDIR)/%.o)
$(BINDIR)/$(TARGET) : $(OBJECTS)
$(LINKER) $# $(LFLAGS) $(OBJECTS) $(STD)
#pull the dependencies to the .o files
-include $(OBJECTS:.o=.d)
#the -o $# says to put the output of the compilation in the file named on the left side of the :.
#the $< is the first item in the dependencies list. Basically the name of the .c file which is to be compiled.
$(OBJECTS) : $(OBJDIR)/%.o :$(SRCDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $# $(STD)
$(CC) $(CFLAGS) -MM $< > $*.d
#mv -f $*.d $*.d.tmp #changes file name
#sed -e 's|.*:|$*.o:|' < $*.d.tmp > $*.d #Unable to understand
#sed -e 's/.*://' -e 's/\\$$//' < $*.d.tmp | fmt -1 | \
sed -e 's/^ *//' -e 's/$$/:/' >> $*.d #Unable to understand
#rm -f $*.d.tmp
.PHONY : run
run :
./$(BINDIR)/$(TARGET) ${TYPE} ${INP_FILE}
print:
#echo $(OBJECTS)
I have understood that it is trying to pre-process the temp file to generate auto dependency. What I am unable to understand is how it is being done. Here are the two lines I want explanation of:
#sed -e 's|.*:|$*.o:|' < $*.d.tmp > $*.d #Unable to understand
#sed -e 's/.*://' -e 's/\\$$//' < $*.d.tmp | fmt -1 | \
sed -e 's/^ *//' -e 's/$$/:/' >> $*.d #Unable to understand
I have never used sed before so I am having problems.
Any help appreciated.

Answer 1

Suppose you are building obj/foo.o from src/foo.c, so the file foo.d.tmp contains:
foo.o: src/foo.c src/foo.h src/bar.h
Now the first sed statement:
#sed -e 's|.*:|$*.o:|' < $*.d.tmp > $*.d
"Read foo.d.tmp, take everything up to a colon and change it to 'foo.o', and write the result to foo.d." So now foo.d contains:
foo.o: src/foo.c src/foo.h src/bar.h
(No change in this case.) Now the next command:
#sed -e 's/.*://' -e 's/\\$$//' < $*.d.tmp | fmt -1 | sed -e 's/^ *//' -e 's/$$/:/' >> $*.d
"Read foo.d.tmp, remove everything up to (and including) a colon, remove the trailing \ if there is one. Take the result and put each word (i.e each prerequisite) on its own line. Then for each line, remove the leading spaces, put a colon at the end, and append the result to foo.d." So now foo.d contains:
foo.o: src/foo.c src/foo.h src/bar.h
src/foo.c:
src/foo.h:
src/bar.h:
The idea is to create an empty rule for each prerequisite, so that if the code has changed and a certain prerequisite is no longer needed -- and no longer present -- but it is still listed in the old foo.d, Make will not panic at being unable to build it.