How to use JSON-CPP? - c++

I've strictly followed this documentation to install and use jsoncpp library in my project : jsoncpp README
But I still have this problem with my compilation:
g++ -W -Wall -Werror -c -o src/ModConnection.o src/ModConnection.cpp
src/ModConnection.cpp:15:23: fatal error: json/json.h: No such file or directory
compilation terminated.
It's happen when I'm trying to use #include <json/json.h>
Here is my Linux MAKEFILE :
CXX = g++
NAME = bin/server
SRCS = ./src/ModConnection.cpp\
./src/unixNetwork.cpp
OBJS = $(SRCS:.cpp=.o)
CXXFLAGS += -W -Wall -Werror
LDFLAGS = -L ./src/jsoncpp-src-0.5.0/buildscons/linux-gcc4.5.1/src/lib_json/libjson_linux-gcc-4.5.1_libmt.a -I src/jsoncpp-src-0.5.0/include
RM = rm -f
$(NAME) : $(OBJS)
$(CXX) $(LDFLAGS) -o $(NAME) $(OBJS)
all : $(NAME)
clean :
$(RM) $(OBJS)
fclean : clean
$(RM) $(NAME)
re : fclean all
.PHONY : all clean fclean re
Thanks for you help.

You're specifying the include directory for jsoncpp in your LDFLAGS variable, but those don't get used until you've already compiled the individual cpp files. You need to put the part -I src/jsoncpp-src-0.5.0/include somewhere in the flags which get added to the compile lines, such as CXXFLAGS.
To expand a bit, you're using implicit Make rules to build your individual .cpp files, then you have a specific target for building your application out of those objects.
See the GNU Make Catalog of Rules for more info, but the one you're using is here:
Compiling C++ programs
n.o is made automatically from n.cc, n.cpp, or n.C with a recipe of the form $(CXX) $(CPPFLAGS) $(CXXFLAGS) -c. We encourage you to use the suffix ‘.cc’ for C++ source files instead of ‘.C’.
Edit: Now for your linking errors.
You're getting these problems because the linker can't find the actual implementations of the functions you're calling.
First, your -L directive needs to point to a folder, not a library. -L sets a search path for libraries. It should be set to the folder where the library the jsoncpp build was created. Next, you must link the library itself. That library name is gigantic, but adding -l json_linux-gcc-4.5.1_libmt to LDFLAGS should do the trick. -l (that's lower ell) sets an actual library to link.

Related

Building a C/C++ program for Windows/MacOS/Linux with dependencies

I need to build a program on Windows, MacOS and Linux which relies on multiples dependencies. I tried to limit them as much as I could but I should ended up using WxWidgets, libcurl, openssl and libarchive.
I choose those dependencies because I must be able to:
compute a md5 hash (openssl)
decompress a zip archive (libarchive)
provide a GUI (WxWidgets)
use HTTPS (libcurl)
I am aware that this might be an overkill to import 5 libraries to only do those 5 things but I do not know any better solution yet. As I am writing this, I'm only using libcurl and openssl and building for Windows, MacOS and Linux is already very difficult for me.
I would like to distribute a standalone executable for each platform in addition to the source code, to build my project, I use the following Makefile :
CXX = g++
NAME = foo
SRC = $(wildcard src/*.cpp)
OBJ = $(SRC:.cpp=.o)
CXXFLAGS = -I./inc -std=c++11 -Wall -Wextra -Werror -g
all : $(NAME)
$(NAME) : $(OBJ)
$(CXX) $(CXXFLAGS) -o $# $^ -lcurl -lssl -lcrypto
clean :
rm -rf $(SRC:.cpp=.o)
fclean : clean
rm -rf $(NAME) test
re : fclean all
reclean : fclean all clean
.PHONY : all clean fclean re reclean
This worked great(even on Windows thanks to MSYS2 and MINGW) until I tried to statically linked each library to distribute a standalone binary :
$(NAME) : $(OBJ)
$(CXX) $(CXXFLAGS) -o $# $^ -lcurl -lssl -lcrypto
becamed
$(NAME) : $(OBJ)
$(CXX) $(CXXFLAGS) -o $# $^ libcurl.a libssl.a libcrypto.a
On Linux(Ubuntu 22.04), I downloaded curl and openssl source codes and built them using -static flags, copied the *.a inside my project's directory and I was done.
Now I'm trying to build curl and openssl on Windows with MSYS2, most of my attempts failed with error messages and took forever(> 30 minutes) to complete the build process. After struggling a little too much time, I finally managed to compile openssl by adding -lcrypto -lcrypt32..?
I do not think I will be able to finish this project with this "building process" as I still need to figure it out how build and link libarchive and WxWidgets. Is there anything I am missed out regarding the building process ? Should I pick others libraries ? Or It is just how it is ?
Thanks for your help.

g++ cannot change include path with -I

I'm on kubuntu using g++ 7.5.0 / GNU make for C++. My file structure:
bin
| .o files
header
|archiver.h
source
|main.cpp
|archiver.cpp
makefile
I want my source files to be able to detect header files without having to do #include "../header/archiver.h". I've tried using:
g++ -I/header
but this does not work. I get the error:
g++: fatal error: no input files.
makefile that was requested
CC = g++
CFLAGS = -c -Wall
objects = bin/main.o bin/archiver.o
all : $(objects)
$(CC) -o build $(objects)
bin/%.o : source/%.cpp
$(CC) $(CFLAGS) $?
mv *.o bin
.PHONY : clean
clean :
rm -rf all $(objects)
The command
g++ -I<header-dir>
doesn't change any default settings for the g++ include search paths with subsequent calls, as you seem to assume.
You'll need to pass that compiler flag for each individual c++ call, which are issued by make according the rules defined in your makefile.
The latter is what you need to adapt, best using a pre-defined makefile variable like CXXFLAGS or CXXINCLUDES (check the GNU-make documentation for details).
For your specific case
CFLAGS = -c -Wall -I./header
should work.

How to "make" an SDL project on linux?

Makefiles are quite confusing to me. I am attempting to "make" my project that I have worked on in Windows. The confusing part is actually constructing the make file from scratch. I would am trying to also link to the SDL2 library, and that is in a '.a' format.
Here is my code for the make file so far, I have tried multiple versions, and this is the latest:
CXX = gcc
OUT = Engine
SRC =Software-Rendering/src/
SDL_INCLUDE_DIR =Software-Rendering/lib/SDL2/include/SDL/
LIB_DIR =Software-Rendering/lib/SDL2/x86/linuxLib/
SDL = -l${LIB_DIR}libSDL -l${LIB_DIR}/libSDL2main
CPP_FILES =Bitmap.cpp Main.cpp Vector3.cpp Window.cpp
H_FILES =Bitmap.h ErrorReport.h Vector3.h Window.h
O_FILES = Bitmap.o ErrorReport.o Main.o Vector3.o Window.o
all: $(OUT)
$(OUT): $(O_FILES)
$(CXX) -o $# $^ ${SDL}
#Making all of the object files down
$(O_FILES): $(H_FILES)
$(CXX) -c $(CPP_FILES)
#Make sure we can easily clean up the directory
clean:
rm -f Engine ${O_FILES}
clean_obj:
rm -f ${O_FILES}
I decided to put the ".a" files in a special directoy in my project so whenever someone clones my repository on github all of the files for compiling and linking are already there.
Why isn't this working and how can I make it work?
Your library linking directive are wrong -- -l prefixes lib to the name you specify, and then searches through the libdir path set by the -L options. So what you want is something like:
SDL = -L$(LIB_DIR) -lSDL -lSDL2main
You can make it clearer/more standard by using the standard varnames for libraries:
LDFLAGS = -L$(LIB_DIR)
LDLIBS = -lSDL -lSDL2main
$(OUT): $(O_FILES)
$(CXX) $(LDFLAGS) $^ $(LDLIBS) -o $#
Also, get rid of the explicit command to compile source files -- the default built in rule is fine and easier to use.

syntax error near unexpected token `newline'

After compiling some code using a Makefile I get this when I try to run it:
$ ./libbookgui.a
./libbookgui.a: line 1: syntax error near unexpected token `newline'
./libbookgui.a: line 1: `!<arch>'
The Makefile has the following contents.
INCLUDES = -I"$(FLTK)"
LIBS = -lstdc++
CXXFLAGS = $(INCLUDES) -Wall -time -O3 -DNDEBUG -Wno-deprecated
LIBFLAGS =
AR = ar
.SUFFIXES: .cpp .o
# Create a list of source files.
SOURCES = $(shell ls *.cpp)
# Create a list of object files from the source file lists.
OBJECTS = ${SOURCES:.cpp=.o}
# Create a list of targets.
TARGETS = libbookgui.a
# Build all targets by default
all: $(TARGETS)
%.a: $(OBJECTS)
$(AR) rcs $# $(OBJECTS)
# A rule to build .o file out of a .cpp file
%.o: %.cpp
$(CXX) $(CXXFLAGS) -o $# -c $<
# A rule to clean all the intermediates and targets
clean:
rm -rf $(TARGETS) $(OBJECTS) *.out *.stackdump
I see that it has the line TARGETS = libbookgui.a and the compiler doesn't return any errors it just creates the .a file.
Any ideas?
libbookgui.a is a static library (that aggregates several object files in it).
You are supposed to run executables, not libraries. Link this library into some executable and run that.
I suggest you read this article.
You need to update your post to show the changes you made to the makefile to get the link line added. Without that we can't really help you with that part of the problem.
Based on the errors my suspicion is that you're not using the right tool for linking: you're either using "gcc" (C compiler front-end) or trying to invoke the linker directly. When you link your application you should use the C++ compiler (in your case, $(CXX)). You also don't need to specify -lstdc++, since the C++ front-end will automatically add that to the link line.

minimum c++ make file for linux

I've looking to find a simple recommended "minimal" c++ makefile for linux which will use g++ to compile and link a single file and h file. Ideally the make file will not even have the physical file names in it and only have a .cpp to .o transform. What is the best way to generate such a makefile without diving into the horrors of autoconf?
The current dir contains, for example
t.cpp
t.h
and I want a makefile for that to be created. I tried autoconf but its assuming .h is gcc instead of g++. Yes, while not a beginner, I am relearning from years ago best approaches to project manipulation and hence am looking for automated ways to create and maintain makefiles for small projects.
If it is a single file, you can type
make t
And it will invoke
g++ t.cpp -o t
This doesn't even require a Makefile in the directory, although it will get confused if you have a t.cpp and a t.c and a t.java, etc etc.
Also a real Makefile:
SOURCES := t.cpp
# Objs are all the sources, with .cpp replaced by .o
OBJS := $(SOURCES:.cpp=.o)
all: t
# Compile the binary 't' by calling the compiler with cflags, lflags, and any libs (if defined) and the list of objects.
t: $(OBJS)
$(CC) $(CFLAGS) -o t $(OBJS) $(LFLAGS) $(LIBS)
# Get a .o from a .cpp by calling compiler with cflags and includes (if defined)
.cpp.o:
$(CC) $(CFLAGS) $(INCLUDES) -c $<
Here is a generic makefile from my code snippets directory:
SOURCES=$(wildcard *.cpp)
OBJECTS=$(SOURCES:.cpp=.o)
DEPS=$(SOURCES:.cpp=.d)
BINS=$(SOURCES:.cpp=)
CFLAGS+=-MMD
CXXFLAGS+=-MMD
all: $(BINS)
.PHONY: clean
clean:
$(RM) $(OBJECTS) $(DEPS) $(BINS)
-include $(DEPS)
As long as you have one .cpp source producing one binary, you don't need anything more. I have only used it with GNU make, and the dependency generation uses gcc syntax (also supported by icc). If you are using the SUN compilers, you need to change "-MMD" to "-xMMD". Also, ensure that the tab on the start of the line after clean: does not get changed to spaces when you paste this code or make will give you a missing separator error.
Have you looked at SCons?
Simply create a SConstruct file with the following:
Program("t.cpp")
Then type:
scons
Done!
Assuming no preconfigured system-wide make settings:
CXX = g++
CPPFLAGS = # put pre-processor settings (-I, -D, etc) here
CXXFLAGS = -Wall # put compiler settings here
LDFLAGS = # put linker settings here
test: test.o
$(CXX) -o $# $(CXXFLAGS) $(LDFLAGS) test.o
.cpp.o:
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c $<
test.cpp: test.h
a fairly small GNU Makefile, using predefined rules and auto-deps:
CC=c++
CXXFLAGS=-g -Wall -Wextra -MMD
LDLIBS=-lm
program: program.o sub.o
clean:
$(RM) *.o *.d program
-include $(wildcard *.d)
Have you looked at OMake ?
OMakeroot
open build/C
DefineCommandVars()
.SUBDIRS: .
OMakefile
.DEFAULT: $(CXXProgram test, test)
Then on Linux or Windows, simply type:
omake
As a bonus, you automatically get:
parallel builds with the -j option (same as make).
MD5 checksums instead of timestamps (build becomes resilient to time synchronization failures).
Automatic and accurate C/C++ header dependencies.
Accurate inter-directory dependencies (something that recursive make does not offer).
Portability (1 build chain to rule them all, immune to path style issues).
A real programming language (better than GNU make).
Some good references on creating a basic Makefile
http://en.wikipedia.org/wiki/Make_(software)
http://mrbook.org/tutorials/make/
http://www.opussoftware.com/tutorial/TutMakefile.htm
http://www.hsrl.rutgers.edu/ug/make_help.html
The first couple in particular have minimal example Makefiles like you were describing. Hope that helps.
SConstruct with debug option:
env = Environment()
if ARGUMENTS.get('debug', 0):
env.Append(CCFLAGS = ' -g')
env.Program( source = "template.cpp" )
florin has a good starting point. I didn't like gnu autoconf so I started there and took the concept further and called it the MagicMakefile. I have 3 versions of it from simple to more complex. The latest is now on github: https://github.com/jdkoftinoff/magicmake
Basically, it assumes you have a standard layout for the source files of your project and uses the wildcard function to create the makefile rules on the fly which are then eval'd, handling header file dependancies, cross compiling, unit tests, install, and packaging.
[edit] At this point I use cmake for all my projects since it generates useful project files for many build systems.
jeff koftinoff
I was hunting around for what a minimal Makefile might look like other than
some_stuff:
#echo "Hello World"
I know I am late for this party, but I thought I would toss my hat into the ring as well. The following is my one directory project Makefile I have used for years. With a little modification it scales to use multiple directories (e.g. src, obj, bin, header, test, etc). Assumes all headers and source files are in the current directory. And, have to give the project a name which is used for the output binary name.
NAME = my_project
FILES = $(shell basename -a $$(ls *.cpp) | sed 's/\.cpp//g')
SRC = $(patsubst %, %.cpp, $(FILES))
OBJ = $(patsubst %, %.o, $(FILES))
HDR = $(patsubst %, -include %.h, $(FILES))
CXX = g++ -Wall
%.o : %.cpp
$(CXX) $(HDR) -c -o $# $<
build: $(OBJ)
$(CXX) -o $(NAME) $(OBJ)
clean:
rm -vf $(NAME) $(OBJ)
If your issues are because autoconf thinks the .h file is a c file, try renaming it to .hpp or .h++