Im compiling a c++ file with the gnu compiler g++. For C I use CFLAGS but its not working for c++. What Im seeing the .cpp files using the -O2 flag but g++ -Wall *.o -o tp2 is compiling without the flags.
I added it manually to tp2 but now the flags are not being used compile. So my question is how do I fix this. Ive also tried with CXXFLAGS and CPPFLAGS. Thanks.
.PHONY: link clean
CFLAGS:= -O2 -Wall
Make: tp2
compile: coordonnees.o personne.o tp2.o
%.o: %.cpp %h
clean:
rm -rf tp2 *~ *.o
tp2: compile
g++ -Wall *.o -o tp2
CFLAGS and the like only apply to the implicit rules of make. Since you defined the command as g++ -Wall *.o -o tp2 instead of depending on an implicit rule, it runs exactly that command. If you want to add those flags you can put $(CFLAGS) on the line where you define the command.
Related
I need help configuring my makefile to use it with the GNU debugger. I am running it on debian.
I am quite new to makefiles and after going through similar questions I've tried adapting the answers of those to my code, but it didn't work out the ways I tried (probably because i don't fully understand the syntax of makefiles).
This is the original (shortened) makefile:
INC=-I include
all: libs poisson_solver
poisson_solver:
g++ -o bin/poisson $(INC) src/main.c\ src/problem_setup.c\ libs/timer_tools.o
libs: libs/timer_tools.o src/problem_setup.o
libs/timer_tools.o: utilities/gettime.c
g++ -c -o libs/timer_tools.o $(INC) utilities/gettime.c
src/problem_setup.o: src/problem_setup.c include/problem_setup.h
g++ -c -o src/problem_setup.o $(INC) src/problem_setup.c include/problem_setup.h
Your Makefile has several errors, and in general contains more cruft than it should.
Here is roughly what it should be:
CFLAGS = -Iinclude -g
OBJS = src/main.o src/problem_setup.o utilities/gettime.o
all: poisson_solver
poisson_solver: $(OBJS)
src/problem_setup.o: src/problem_setup.c include/problem_setup.h
See this section of the manual.
I suppose this question is asked in some other threads, I was getting the error while calling make: to_string is not declared in this scope. I found out I have to add c++11 in makefile. But I tried some options mentioned in several threads. Could you provide some solution here? Thanks
Adding -std=c++11 to CFLAGS will cause g++ to compile with the C++11 standard. Like this
CFLAGS=-std=c++11 -c -g -O3 -finline-functions -fstack-protector
However, as highlighted in comments the appropriate syntax for compiling C++ programs with a makefile is to use a rule like this
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c
where your C++ files use the suffix .cc [1]. Then you would add -std=c++11 to CXXFLAGS. The difference between CPPFLAGS and CXXFLAGS is [2]
CPPFLAGS is supposed to be for flags for the C PreProcessor; CXXFLAGS
is for flags for the C++ compiler.
This would require some rewrites within your makefile, namely
CXX=g++
LD=g++
CXXFLAGS=-c -g -O3 -fstack-protector -I./Eigen
and rules from
$(CC) $(INCLUDE) $(CFLAGS) -c
to
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c
as above.
The $(INCLUDE) can also be removed from your linking command ($(LD)) as it is only needed during compile time. Your linking command can also be simplified to
ParEGOIteration13: ParEGOIteration13.o Utilities.o WeightVector.o SearchSpace.o DACE.o GeneticAlgorithm.o Matrix.o
$(CXX) $? -o $#
by using the automatic variables [3]
$? expands to all of the prerequisites
$# expands to the name of the target
I'll let you work out how to use the automatic variables in your compilation rules.
Note: I've removed -finline-functions as -O3 (and -O2) turn it on by default with gcc.
I have a Makefile that works for how I'm using it, but will anyone tell me if what I'm doing is good practice? Or if there is a better, cleaner or more efficient way to achieve the goal I am reaching?
Here is my Makefile Code.
# Object files to either reference or create
OBJECTS = Proj2.o Blackjack.o Deck.o Card.o Hand.o Player.o
# The executable file that will be created
EXEC = Proj2.out
# The c++ flags to use for compilation
CXXFLAGS = -Wall
# The c++ compiler to use for compilation
CXX = g++
# This section is called on 'make'
# Will call compile, and then call clean
all: compile clean
# Perform action on all object files (May or may not exist)
# The makefile will implicitly compile all .o files needed
# Will also compile them into the EXEC file listed
compile: $(OBJECTS)
$(CXX) $(CXXFLAGS) -o $(EXEC) $(OBJECTS)
# This section is called after compilation is completed
# This will clean all existing .o files listed in the directory
clean:
rm -f *.o
Here is the terminal output when I call make.
g++ -Wall -c -o Proj2.o Proj2.cpp
g++ -Wall -c -o Blackjack.o Blackjack.cpp
g++ -Wall -c -o Deck.o Deck.cpp
g++ -Wall -c -o Card.o Card.cpp
g++ -Wall -c -o Hand.o Hand.cpp
g++ -Wall -c -o Player.o Player.cpp
g++ -Wall -o Proj2.out Proj2.o Blackjack.o Deck.o Card.o Hand.o Player.o
rm -f *.o
Is it good practice to use a Makefile like this? Specifically, am I doing the cleaning part of my Makefile correctly?
You should not make all depend on clean at all. By doing this you are ensuring that every time you run make, you have to recompile everything. If you want to do that then using make is itself useless: just write a shell script that compiles and links your code.
The clean target should be a separate target and if you want to clean your workspace you run make clean explicitly.
The other problem with your makefile is that the link rule lists compile as the target, but it builds $(EXE). It's almost never a good idea to have a rule create a file which is not exactly the target you told make it would build. To ensure this, always use $# as the target to generate. Rewrite it like this:
compile: $(EXE)
$(EXE): $(OBJECTS)
$(CXX) $(CXXFLAGS) -o $# $^
When I want to compile, I need to specify -std=c++11 like this:
g++ -Wall -std=c++11 main.cpp -o main
and I wonder if there was a solution to set the -std=c++11 flag permanently so it will be possible to do:
g++ -Wall main.cpp -o main
without flags.
Create an alias: alias g++='g++ -std=c++11' should do the trick.
(However, the version of GCC that comes with OS X is so ancient that it doesn't support C++11, you'd be better off using clang and clang++.)
I know this already has an accepted but I feel like I have some advice to offer. For one you should be using a makefile for c++, this is the one I use for answering on SO.
CFLAGS=-std=c++11
CFLAGS+=-stdlib=libc++
CC=clang++
#flags for test.c
cc=clang
DEBUG=-g
#warnings
WARNINGS=-Weverything
#always have -Weverything on for SO lol
OPT= -O0 -O1 -O2 -O3 -O4
test: test.cpp
$(info set CC for compiler)
$(CC) $(CFLAGS) $< -o $# $(DEBUG)
stack: stack.cpp
$(CC) $(CFLAGS) stack.cpp -o $# $(DEBUG) $(WARNINGS)
testc: test.c
$(cc) $< -o $# $(DEBUG)
clean:
rm test
Now whenever I download someones crappy code from SO I have a makefile for c and c++ files where I can easily change the flags if I want to.
As for bash alias I would suggest you alias it like so alias clang++11='clang++ -std=c++11 this way you don't overwrite the clang++ if you don't want to use the c++11 standard. Lastly you can add the line I just showed you to your .bash_profile on a mac which is in your home or ~ folder, this will make the change permanent. Once you change it run source .bash_profile to put the changes into effect. On linux I think the file is called .bashrc. Hopefully these tips will help you out when ur c++ing, I would advise you to learn the mac command line, has differences from the linux one, it can be very useful to know some of the things it can do.
I've been using c++ casually for a couple of months with a makefile I don't even remember where I got or if I did it myself (the actual structure it has. I know I've added some libraries and flags though):
SRC = filename.cpp
TARG = filename
CC = g++
CPPFLAGS = -g -Wall -Werror -Wextra -pipe -pedantic -Weffc++ -std=c++0x -O2 -Wno-unused-function `pkg-config --cflags opencv`
LDFLAGS = `pkg-config --libs opencv` -lboost_regex -lboost_filesystem
OBJ = $(SRC:.cpp=.o)
all: $(TARG)
clean:
rm -f *~ *.o $(TARG)
I wanted to use it to compile a class, but first I have to understand what is going on since I have to modify it a bit. Also, are there any bad practices in it?
If you want to compile a class instead of a program, you need to do a little surgery on the file. I'm assuming that you want an object file, not a library; the rules for libraries are more complex. But this should do the trick.
SRC = class.cpp
OBJ = $(SRC:.cpp=.o)
CC = g++
CPPFLAGS = -g -Wall -Werror -Wextra -pipe -pedantic -Weffc++ -std=c++0x -O2 \
-Wno-unused-function `pkg-config --cflags opencv`
LDFLAGS = `pkg-config --libs opencv` -lboost_regex -lboost_filesystem
DEBRIS = core a.out *~
all: $(OBJ)
class.o: class.h
clean:
rm -f $(DEBRIS) $(OBJ)
It is not immediately clear whether $(CPPFLAGS) will automatically appear in the compilation or linking commands.
If you end up wanting to build the program from two files, then you use a hybrid:
SRC = filename.cpp class.cpp
OBJ = $(SRC:.cpp=.o)
PROGRAM = program
CXX = g++
CXXFLAGS = -g -Wall -Werror -Wextra -pipe -pedantic -Weffc++ -std=c++0x -O2 \
-Wno-unused-function `pkg-config --cflags opencv`
LDFLAGS = `pkg-config --libs opencv` -lboost_regex -lboost_filesystem
DEBRIS = core a.out *~
all: $(PROGRAM)
$(PROGRAM): $(OBJ)
$(CXX) $(CXXFLAGS) -o $# $(OBJ) $(LDFLAGS)
class.o: class.h
filename.cpp: class.h
clean:
rm -f $(DEBRIS) $(OBJ) $(PROGRAM)
Note that I've changed the macro for the C++ compiler from CC to CXX. The standards are not clear on the name for the C++ compiler. POSIX doesn't mention C++ in its description of make. However, CC is clearly intended for compiling C rather than C++. That needn't stop your version of make from using CC for C++ compilation, but it would be a little unusual. (GNU Make 3.81 on MacOS X 10.6.8 uses CXX for the C++ compilation.) The link line now uses $(CXXFLAGS) (thanks to eriktous); it is still not clear whether the C++ source to object file compilation would do so. Ultimately, that's why you end up seeing makefiles with rules such as:
class.o: class.h
$(CXX) -c $(CXXFLAGS) $*.cpp
This guarantees that the compilation rule is what you see for this object file. You might write that as an old-fashioned but portable suffix rule (.cpp.o:) instead; the POSIX specification for make supports these. Or you might use the more modern but not necessarily quite as portable %.o : %.o notation instead (not required by POSIX). Either of these replaces any previous (built-in) definition of how to compile an object file from C++ source.
.cpp.o:
$(CXX) -c $(CXXFLAGS) $*.cpp
%.o : %.cpp
$(CXX) -c $(CXXFLAGS) $*.cpp
I assume you are using opencv (and some of Boost); if not, your compilation and linking flags include irrelevant options. The dependencies are guessed; make will infer the dependency of the object file on the C++ source code, so I only listed header dependencies. But you may have many more if you're using opencv and Boost.
(Makefiles not formally tested.)
when you type "make" with no args, it looks for the first recipe, something that starts in the first column with a colon after it. that would be all, which tells it to build TARG. TARG is filename. Make is already configured on many systems to know what to do with .cpp files, so there is no specific recipe in this Makefile to do that. The OBJ construct is unused here, so no need to explain that; but what it means is "replace .cpp in SRC with .o", so OBJ would be filename.o.
It already looks good. You defined the proper variables, the file is short and readable, what else do you want?
In the clean target, you could only remove $(OBJ) instead of *.o. And you should not remove your editor's backup files as part of the build process. I suggest this instead:
clean:
rm -f $(TARG) $(OBJ)
clean-all: clean
rm -f *~
# mark these targets as non-files.
.PHONY: all clean clean-all