When I want to compile, I need to specify -std=c++11 like this:
g++ -Wall -std=c++11 main.cpp -o main
and I wonder if there was a solution to set the -std=c++11 flag permanently so it will be possible to do:
g++ -Wall main.cpp -o main
without flags.
Create an alias: alias g++='g++ -std=c++11' should do the trick.
(However, the version of GCC that comes with OS X is so ancient that it doesn't support C++11, you'd be better off using clang and clang++.)
I know this already has an accepted but I feel like I have some advice to offer. For one you should be using a makefile for c++, this is the one I use for answering on SO.
CFLAGS=-std=c++11
CFLAGS+=-stdlib=libc++
CC=clang++
#flags for test.c
cc=clang
DEBUG=-g
#warnings
WARNINGS=-Weverything
#always have -Weverything on for SO lol
OPT= -O0 -O1 -O2 -O3 -O4
test: test.cpp
$(info set CC for compiler)
$(CC) $(CFLAGS) $< -o $# $(DEBUG)
stack: stack.cpp
$(CC) $(CFLAGS) stack.cpp -o $# $(DEBUG) $(WARNINGS)
testc: test.c
$(cc) $< -o $# $(DEBUG)
clean:
rm test
Now whenever I download someones crappy code from SO I have a makefile for c and c++ files where I can easily change the flags if I want to.
As for bash alias I would suggest you alias it like so alias clang++11='clang++ -std=c++11 this way you don't overwrite the clang++ if you don't want to use the c++11 standard. Lastly you can add the line I just showed you to your .bash_profile on a mac which is in your home or ~ folder, this will make the change permanent. Once you change it run source .bash_profile to put the changes into effect. On linux I think the file is called .bashrc. Hopefully these tips will help you out when ur c++ing, I would advise you to learn the mac command line, has differences from the linux one, it can be very useful to know some of the things it can do.
Related
Just taking a use case for this instance. I'm compiling a c++ file, and sometimes, I'd like to compile without debugging symbols i.e. the -g enabled and sometimes I would like to enable it.
So, I thought of just making two targets in which the second target would reassign a make variable(is it possible) and change the compiling options. I wonder if such a behaviour is possible to achieve with makefiles?
Below is some pseudocode demo and the user enters make first#bg into the command line:
gpp = g++ -std=c++17
first: hello.cpp
$(gpp) hello.cpp -o $#
#/* some other recipes, assuming the list is really long*/
first#bg: main.o
gpp = g++ -g -std=c++17
execute_all_recipe_of_first_target_which_is_really_long_to_copy()
main.o: main.cpp
$(gpp) main.cpp -c -o main.o #the value of gpp should'd also changed here since first#bg executed
If it is possible please provide me with the actual syntax for the demonstrated behaviour. Thanks in advance.
You can do something like this:
first#bg: gpp += -g
first#bg: first
Note that it's more idiomatic to define CXX=g++ and CXXFLAGS=-std=c++17 and then tweak CXXFLAGS, and use make DEBUG=1 for debug builds:
CXX=g++
CXXFLAGS=-std=c++17
ifeq ($(DEBUG), 1)
CXXFLAGS+=-g
endif
Then invoke the compiler as $(CXX) $(CXXFLAGS) hello.cpp -o $# for example. See also this link
I need help configuring my makefile to use it with the GNU debugger. I am running it on debian.
I am quite new to makefiles and after going through similar questions I've tried adapting the answers of those to my code, but it didn't work out the ways I tried (probably because i don't fully understand the syntax of makefiles).
This is the original (shortened) makefile:
INC=-I include
all: libs poisson_solver
poisson_solver:
g++ -o bin/poisson $(INC) src/main.c\ src/problem_setup.c\ libs/timer_tools.o
libs: libs/timer_tools.o src/problem_setup.o
libs/timer_tools.o: utilities/gettime.c
g++ -c -o libs/timer_tools.o $(INC) utilities/gettime.c
src/problem_setup.o: src/problem_setup.c include/problem_setup.h
g++ -c -o src/problem_setup.o $(INC) src/problem_setup.c include/problem_setup.h
Your Makefile has several errors, and in general contains more cruft than it should.
Here is roughly what it should be:
CFLAGS = -Iinclude -g
OBJS = src/main.o src/problem_setup.o utilities/gettime.o
all: poisson_solver
poisson_solver: $(OBJS)
src/problem_setup.o: src/problem_setup.c include/problem_setup.h
See this section of the manual.
I suppose this question is asked in some other threads, I was getting the error while calling make: to_string is not declared in this scope. I found out I have to add c++11 in makefile. But I tried some options mentioned in several threads. Could you provide some solution here? Thanks
Adding -std=c++11 to CFLAGS will cause g++ to compile with the C++11 standard. Like this
CFLAGS=-std=c++11 -c -g -O3 -finline-functions -fstack-protector
However, as highlighted in comments the appropriate syntax for compiling C++ programs with a makefile is to use a rule like this
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c
where your C++ files use the suffix .cc [1]. Then you would add -std=c++11 to CXXFLAGS. The difference between CPPFLAGS and CXXFLAGS is [2]
CPPFLAGS is supposed to be for flags for the C PreProcessor; CXXFLAGS
is for flags for the C++ compiler.
This would require some rewrites within your makefile, namely
CXX=g++
LD=g++
CXXFLAGS=-c -g -O3 -fstack-protector -I./Eigen
and rules from
$(CC) $(INCLUDE) $(CFLAGS) -c
to
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c
as above.
The $(INCLUDE) can also be removed from your linking command ($(LD)) as it is only needed during compile time. Your linking command can also be simplified to
ParEGOIteration13: ParEGOIteration13.o Utilities.o WeightVector.o SearchSpace.o DACE.o GeneticAlgorithm.o Matrix.o
$(CXX) $? -o $#
by using the automatic variables [3]
$? expands to all of the prerequisites
$# expands to the name of the target
I'll let you work out how to use the automatic variables in your compilation rules.
Note: I've removed -finline-functions as -O3 (and -O2) turn it on by default with gcc.
I am taking a C++ course in college and they want us to manually type in all of the test files... I know, however, that there is a way to do it with out, which is how I ended up with the current(http://pastebin.com/6d9UtKM4) makefile. My question is, why is this makefile automatically removing all the .o files it uses for compiling when it is done? It's not killing me, but I would like to preserve the .o files. I have pasted the makefile here(http://pastebin.com/6d9UtKM4). I have also pasted the current result of running "make tests" here(http://pastebin.com/h3Ny3dib). (Note the part at the bottom of that page that removes all the .o files automatically.)
I would also like to be able to make it generate it like this:
g++ -o compileDir/assembler.o -c -Wall src/assembler.cpp
g++ -o compileDir/string.o -c -Wall src/string.cpp
g++ -c -Wall -o compileDir/test_assignment.o testSrc/test_assignment.cpp
g++ -o testDir/test_assignment compileDir/test_assignment.o compileDir/string.o compileDir/assembler.o
g++ -c -Wall -o compileDir/test_bracket.o testSrc/test_bracket.cpp
g++ -o testDir/test_bracket compileDir/test_bracket.o compileDir/string.o compileDir/assembler.o
testDir/test_bracket
testDir/test_assignment
In other words, I want it to compile everything, then run everything. I hope this isn't too much to ask!
Edit: Additional Information: (This is the code that does "make tests")
tests: assembler.o string.o $(test_output) $(test_stringOutput)
#echo '--- Testing complete ---'
$(testDir)%: $(compileDir)%.o string.o
g++ -o $# $< $(compileDir)string.o $(compileDir)assembler.o
$#
#echo ''
$(compileDir)%.o: $(testSourceDir)%.cpp
g++ -c -Wall -o $# $<
$(compileDir)%.o: $(testStringSrc)%.cpp
g++ -c -Wall -o $# $<
EDIT: -----------------------------------------
Resolved via comments:
Adding this line fixed it:
.PRECIOUS $(compileDir)%.o
You might add
.PRECIOUS: %.o
which should be implicit, but perhaps you've got a weird setup.
Make treats your .o files as intermediate and removes them. You can prevent automatic deletion of those by adding them a dependency of the special .SECONDARY target. See Chains of Implicit Rules for more details. Good luck!
Hi all: quick question: I'm in a situation where it would be useful to generate my C++ executable using only 'gcc' (without g++). Reason for this is that I have to submit the code to an automatic submission server which doesn't recognize the 'g++' (or 'c++', for that matter) command.
In my experiments, while I'm compiling gcc works well. Problem is, when I try to link the generated object files it gets messed up. Now, based on what I understood from the gcc man page (I may be way off, so tell me if I am), g++ is basically gcc, but it links the C++ library.
If this is true, how can I (if possible) explicitly link the C++ library without using the g++ (or c++) command?
EDIT: I'm adding the makefile to better illustrate the problem:
COMPILER = gcc
CFLAGS = -Wall -g -x c++
# MODULE COMPILATION
model: modules/model.h modules/sources/model.cpp
$(COMPILER) $(CFLAGS) -c modules/sources/model.cpp -o obj/model.o
algorithms: modules/algorithms.h modules/sources/algorithms.cpp
$(COMPILER) $(CFLAGS) -c modules/sources/algorithms.cpp -o obj/algorithms.o
io: modules/io.h modules/sources/io.cpp
$(COMPILER) $(CFLAGS) -c modules/sources/io.cpp -o obj/io.o
stopwatch: modules/stopwatch.h modules/sources/stopwatch.cpp
$(COMPILER) $(CFLAGS) -c modules/sources/stopwatch.cpp -o obj/stopwatch.o
# EXECUTABLE GENERATION
exe: model algorithms io stopwatch
$(COMPILER) $(CFLAGS) main.cpp obj/model.o obj/algorithms.o obj/io.o obj/stopwatch.o -o bin/process
# DEFAULT TEST CASE
run: exe
./bin/process -i data/nasa_small.log -a data/nasa_small.access -s data/nasa_small.stack
# CLEANING ROUTINE
clean:
rm -f obj/*
You can link the standard c++ library with the -l flag to gcc:
gcc cplusplus.o -lstdc++ -o myexe
If you run g++ with the "-v" option, it will show what command and options it uses. You should be able to deduce the correct gcc command line from there.