what is the following oop structure here? - c++

Question

In the code below where is the variable, and where is the variable type? We have here properties of registers being changed.
If its an object oriented then we need an object name where we change its properties.
In here I don't see where is the type where is the variable name and how exactly we change its inner properties?
#include <stm32f0xx.h>
int main(void)
{
RCC->AHBENR|=RCC_AHBENR_GPIOCEN ;
GPIOC->MODER|=GPIO_MODER_MODERG_O ;
}

Answer 1

This has nothing to do with OOP, it is just a structure member assignment. RCC and GPIOC are defined in stm32f0xx.h:
#define RCC ((RCC_TypeDef *) RCC_BASE)
and
#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE)
Where RCC_BASE and GPIOC_BASE are are defined in the same header as abaolute addresses, and RCC_TypeDef and GPIO_TypeDef are structure types - for example:
typedef struct
{
__IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */
__IO uint16_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */
uint16_t RESERVED0; /*!< Reserved, 0x06 */
__IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */
__IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */
__IO uint16_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */
uint16_t RESERVED1; /*!< Reserved, 0x12 */
__IO uint16_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */
uint16_t RESERVED2; /*!< Reserved, 0x16 */
__IO uint32_t BSRR; /*!< GPIO port bit set/reset registerBSRR, Address offset: 0x18 */
__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
__IO uint32_t AFR[2]; /*!< GPIO alternate function low register, Address offset: 0x20-0x24 */
__IO uint16_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */
uint16_t RESERVED3; /*!< Reserved, 0x2A */
}GPIO_TypeDef;
So expanding the macros in:
RCC->AHBENR|=RCC_AHBENR_GPIOCEN ;
resolves to:
((RCC_TypeDef*)0x40021000)->AHBENR |= ((uint32_t)0x00080000) ;
Where 0x40021000 is the base address of the RCC, an AHBENR refers to an RCC register to which the GPIOC enable flag is being set.
stm32f0xx.h defines structures for the register set of each peripheral, then defined macros that map the structure to the address at which each peripheral resides.