VHDL if-else condition order - if-statement

Any idea what is the difference betweet this:
p_persist_reg_CRC_calc: process (Clk_50Mhz)
begin
if falling_edge(Clk_50Mhz) then
if crc_rx_init <= '0' then
flash_crc_calc <= (others =>'1');
else
flash_crc_calc <= (others =>'0');
end if;
end if;
end process p_persist_reg_CRC_calc;
and this:
p_persist_reg_CRC_calc: process (Clk_50Mhz)
begin
if falling_edge(Clk_50Mhz) then
if crc_rx_init <= '1' then
flash_crc_calc <= (others =>'0');
else
flash_crc_calc <= (others =>'1');
end if;
end if;
end process p_persist_reg_CRC_calc;
The second stack to zero.
In my understanding they should be the same as function.
Regards,
Emil

Most likely a typo: try
if crc_rx_init = '1' then
( '0' and '1' are both <= '1' )

Assuing crc_rx_init is a std_logic, then the only difference is likely in simulation.
Remember, std_logic has 9 states ('U', '0', '1', 'X', 'Z', 'L', 'H', 'W', '-'). In the first case, if crc_rx_init was 'U', then flash_crc_calc would be all '0'. In the second case, flash_crc_calc would be all '1'.

Related

Ask User to re enter string if it doesnt match to items in list

im having trouble asking the user to re-enter input if it doesn't match string values from specific list. what have i missed?
El_List = 'H', 'He', 'Li', 'Be', 'B', 'C', 'N', 'O', 'F', 'Ne'
user_instructions = ( 'Select Elements value from following list to create a molecule')
print (user_instructions )
while true :
try :
elem = str(input('add molecular formula: '))
if elem = 'H' or = 'He' or = 'Li' or = 'Be' or = 'B' or = 'C' or = 'N' or = 'O' or = 'F' or = 'Ne':
print (elem)
break,
else :
print ('Not Found in Element list)
except: ValueError :
print('add molecular formula: ')
continue
Welcome to SO. First of all, you have a lot of indentation errors in your code. I just tried on my side after cleaning up the code and is working fine.
Try this:
El_List = 'H', 'He', 'Li', 'Be', 'B', 'C', 'N', 'O', 'F', 'Ne'
user_instructions = ( 'Select Elements value from following list to create a molecule')
print (user_instructions)
while True:
try :
elem = str(input('add molecular formula: '))
if elem == 'H' or elem == 'He' or elem == 'Li' or elem == 'Be' or elem == 'B' or elem == 'C' or elem == 'N' or elem == 'O' or elem == 'F' or elem == 'Ne':
print(elem)
break
else :
print ('Not Found in Element list')
except ValueError :
print('add molecular formula: ')
continue
Your except is inside your try statement. Make sure all the indentations are correct. Hope this helps!

How to compare two lists of different length and map the items based on count

I have two lists of different lengths and i want match the items based on their actual relation. One list is the secondary structure elements and other list is aligned sequence. I want to match the secondary structure to its residues in the other list. And adjust the length of secondary structure by inserting '-' to that of gaps in the aligned sequence. The items in ss corresponds to RRCAVVTG in seq.
ss=['-', '-', 'E', 'E', 'E', 'E', 'S', 'S']
seq≈["---------------RRCAVVTG"]
for m in seq:
found=[i for i in list(m)]
sscount=0
sscount1=0
for char,ssi in zip(found,ss):
if char!='-' :
print char , sscount, ssi
sscount+=1
else:
print char, sscount1, '#'
sscount1+=1
The expected results:
---------------##EEEESS
---------------RRCAVVTG
But i get the following results:
- 0 #
- 1 #
- 2 #
- 3 #
- 4 #
- 5 #
- 6 #
- 7 #
I hope I understood the question right. First we fill the string ss with - and then compare it to the string inside seq using zip():
ss = ['-', '-', 'E', 'E', 'E', 'E', 'S', 'S']
seq = ["---------------RRCAVVTG"]
out = ''
for ch1, ch2 in zip('{:->{}}'.format(''.join(ss), len(seq[0])), seq[0]):
if ch1=='-' and ch2 !='-':
out += '#'
elif ch1=='-' and ch2 == '-':
out += '-'
else:
out += ch1
print(out)
print(seq[0])
Prints:
---------------##EEEESS
---------------RRCAVVTG
for m in seq:
found=[i for i in list(m)]
sscount=0
sscount1=0
num=0
for char,ssi in zip(found,itertools.cycle(ss)):
if char!='-' :
print char , sscount, ss[num]
d.append(ss[num])
num+=1
sscount+=1
else:
print char, sscount1, '#'
sscount1+=1

Python comparison operators

I have two values e.g a=972 and b=11188.
I want to get the details of all entries from a tab delimited text file which lies in between both numbers. The python comparison operators <= and >= are returning wrong results.
I have used the <= and >= operators in the if statement.
if l1[3]<="18188" >="900" and l1[2]=="1":
and it is returning nothing.
when I write
if l1[3]<="18188":
it returns "18166 and 11188 as output". I ideally this if function must return "11188 ,972 and 3632".
This is the tab delimited file.
SRR6298199.1 16 1 3632 0 50M32S * 0 0 AACAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAACCC !!""""!"!"!"!!"!!!""""""!!!""""!"" NM:i:1 AS:i:48 XS:i:47
SRR6298199.10 0 1 972 0 40M274S * 0 0 AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAATCAATTTGAA !"""'$""!"!"""" NM:i:0 AS:i:40 XS:i:40 XP:Z:3,+18166143,41S36M237S,0,0;
SRR6298199.10 0 1 18166 0 41S36M237S * 0 0 AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAATCAATTT !"""!#!#$#$"!"""" NM:i:0 AS:i:36 XS:i:34 XP:Z:2,+9723273,40M274S,0,0;
SRR6298199.11 16 1 11188 0 1841S9M * 0 0 GACCAGTATCGGGCCGGCATAAGCCTCGAATTTCACCAGCA !!!!!!""!#!"%%&)(%-//.//,".,.+.-..&! NM:i:18 AS:i:81 XS:i:81
Here is the complete code.. please figure out why this code is not returning true results.
# EXTRACTING THE DETAILS OF READS ALIGNED ON CHR_1
fr=open("Sample.txt","r")
z=fr.read()
bz=z.split("\n")
temp1=[]
for bases in bz:
temp1.append(bases.split("\t"))
cc1=[]
se=[] #READ NAMES ALIGNED ON CHR_1
chr2=[] #READ NAMES ALIGNED ON CHR_2
for l1 in temp1:
if l1[3]<="18188" >="900" and l1[2]=="1":
#print(l1[3])
#cc1.append("#"+str(l1[0])+"\t"+"length="+str(len(l1[9]))+"\n"+l1[9]+"\n"+"+"+l1[0]+"\t"+"length="+str(len(l1[9]))+"\n"+l1[10])
cc1.append("#"+str(l1[0])+" "+"/1"+"\n"+"+"+"\n"+l1[9])
print(cc1)
I expect the output of if l1[3]<="18188" >="900" and l1[2]=="1": to be
['SRR6298199.1', '16', '1', '3632', '0', '50M32S', '*', '0', '0', 'AACAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAACCC', '!!""""!"!"!"!!"!!!""""""!!!""""!""', 'NM:i:1', 'AS:i:48', 'XS:i:47']
['SRR6298199.10', '0', '1', '972', '0', '40M274S', '*', '0', '0', 'AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAATCAATTTGAA', '!"""\'$""!"!""""', 'NM:i:0', 'AS:i:40', 'XS:i:40', 'XP:Z:3,+18166143,41S36M237S,0,0;']
['SRR6298199.11', '16', '1', '11188', '0', '1841S9M', '*', '0', '0', 'GACCAGTATCGGGCCGGCATAAGCCTCGAATTTCACCAGCA', '!!!!!!""!#!"%%&)(%-//.//,".,.+.-..&!', 'NM:i:18', 'AS:i:81', 'XS:i:81']
['SRR6298199.10', '0', '1', '18166', '0', '41S36M237S', '*', '0', '0', 'AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAATCAATTT', '!"""!#!#$#$"!""""', 'NM:i:0', 'AS:i:36', 'XS:i:34', 'XP:Z:2,+9723273,40M274S,0,0;']
but aforementioned if statement is returning [], an empty list
Two problems:
1) you misuse / misorder the comparisonoperators
if l1[3]<= "18188" >="900" and l1[2]=="1": # always false becase "1..." is never >= "9.."
should most probably be
if "900"<= l1[3] <="18188" and l1[2]=="1":
2) you use lexicografical comparison to compare numbers - this will fail because in lexicographical comparisons "9" is bigger then "1111111"
You can fix both errors using correct comparison syntax and float-values for comparison:
if 900 <= float(l1[3]) <= 18188 and l1[2]=="1":

Regex for individual characters between () but excluding what's ouside

I need a regex that works as follows, I've been trying for a day and can't figure it out.
(IIILjava/lang/String;Ljava/lang/String;II)V = ['I', 'I', 'I', 'I',
'Ljava/lang/String;', 'Ljava/lang/String;', 'I', 'I'] Ignoring whats after )
(IIJ)J = ['I', 'I', 'J']
(IBZS)Z = ['I', 'B', 'Z', 'S']
I've gotten (I|D|F|Z|B|S|L.+?;) so far but I can't get it to ignore that character that's after ')'.
(?<=\([^()]{0,10000})[A-Z][^A-Z()]*(?=[^()]*\))
(?<=\([^()]{0,10000}) Positive lookbehind ensuring what precedes is (, followed by any character except ( or ) between 0 and 10000 times. The upper limit may be adjusted as needed, but must not be infinite.
[A-Z] Match any uppercase ASCII letter
[^A-Z()]* Match any character except an uppercase ASCII letter, ( or ) any number of times
(?=[^()]*\)) Positive lookahead ensuring what follows is any character except ( or ) any number of times, followed by )
Results:
['I', 'I', 'I', 'I', 'Ljava/lang/String;', 'Ljava/lang/String;', 'I', 'I']
['I', 'I', 'J']
['I', 'B', 'Z', 'S']
Sample code: See in use here

If statement using vhdl-counter

It'z DFF counter counts from 0 to 10, and from 10 to 0. There z switch to switch between Ascending/Descending. On of the guys in this website helped me to solve the if statement problem but it looks itz not allowed to use it outside the process , si if any one could help and have any idea to use when istead . would be perfect. using planahead to design this counter
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity counter_10 is
port(
clk, reset, pause: in std_logic;
q: out std_logic_vector(3 downto 0)
);
end counter_10;
architecture arc_counter of counter_10 is
constant M: integer:=10;
signal r_reg: unsigned(3 downto 0);
signal r_next: unsigned(3 downto 0);
begin
process(clk, reset, pause)
begin
if(reset='1') then r_reg <=(others=>'0');
elsif pause = '1' then
r_reg<=r_reg;
elsif (clk'event and clk='1') then
r_reg<=r_next;
end if;
end process;
------------------------------------------------------------------------
if (inc_dec='1') then
if (r_reg=(M-1)) then
r_next <= (others=>'0');
else
r_reg+1;
end if;
elsif (inc_dec='0') then
if (r_reg=(M-10)) then
r_next <= to_unsigned(9, 4);
else
r_reg-1;
end if;
end if;
------------------------------------------------------------------------
--Output logic
q<= std_logic_vector(r_reg);
end arc_counter;
The error still the same :
[HDLCompiler 806] Syntax error near "if".
[HDLCompiler 806] Syntax error near "then".
[HDLCompiler 806] Syntax error near "else".
[HDLCompiler 806] Syntax error near "then".
[HDLCompiler 806] Syntax error near "then".
[HDLCompiler 806] Syntax error near "else".
Notice your missing an port with mode in for inc_dec.
As mentioned in the comment your if statement isn't a concurrent statement and needs to go in a process.
Your increments and decrements for r_next aren't correct for VHDL.
The pause shouldn't be asynchronous It infers a latch following the r_reg register.
Fix all those and it looks something like this:
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity counter_10 is
port (
clk: in std_logic;
reset: in std_logic;
pause: in std_logic;
inc_dec: in std_logic; -- ADDED
q: out std_logic_vector(3 downto 0)
);
end counter_10;
architecture arc_counter of counter_10 is
-- constant M: integer := 10; -- not needed
signal r_reg: unsigned(3 downto 0);
signal r_next: unsigned(3 downto 0);
begin
UNLABELED:
process(clk, reset)
begin
if reset = '1' then
r_reg <= (others=>'0');
-- elsif pause = '1' then
-- r_reg <= r_reg;
elsif clk'event and clk = '1' and not pause = '1' then
r_reg <= r_next;
end if;
end process;
ADDED_PROCESS:
process (inc_dec, r_reg)
begin
if inc_dec = '1' then
if r_reg = 9 then -- r_reg = M - 1 then
r_next <= (others => '0');
else
r_next <= r_reg + 1; -- r_reg+1;
end if;
elsif inc_dec = '0' then
if r_reg = 0 then -- r_reg = M - 10 then
r_next <= to_unsigned(9, 4);
else
r_next <= r_reg - 1; -- r_reg-1;
end if;
end if;
end process;
--Output
q<= std_logic_vector(r_reg);
end arc_counter;
And about now someone is bound to chime in and write that the two processes can be consolidated.
And that could look something like:
architecture foo of counter_10 is
-- constant M: integer := 10; -- not needed
signal r_reg: unsigned(3 downto 0);
signal r_next: unsigned(3 downto 0);
begin
SINGLE_PROCESS:
process(clk, reset)
begin
if reset = '1' then
r_reg <= (others=>'0');
-- elsif pause = '1' then
-- r_reg <= r_reg;
elsif clk'event and clk = '1' and not pause = '1' then
if inc_dec = '1' then
if r_reg = 9 then
r_reg <= (others => '0');
else
r_reg <= r_reg + 1;
end if;
elsif inc_dec = '0' then -- and this could be simply else
if r_reg = 0 then
r_reg <= to_unsigned(9, 4);
else
r_reg <= r_reg - 1;
end if;
end if;
r_reg <= r_next;
end if;
end process;
--Output
q<= std_logic_vector(r_reg);
end architecture;
Subject to further improvements or alternate implementations.