Creating a robust Makefile for C++ program - c++

Consider the following trivial Makefile. Notice that there are two classes with corresponding .h and .cpp files for each.
output: main.o class1.o class2.o
g++ main.o class1.o class2.o -o output
main.o: main.cpp
g++ -c main.cpp
class1.o: class1.cpp class1.h
g++ -c class1.cpp
class2.o: class2.cpp class2.h
g++ -c class2.cpp
clean:
rm *.o output
Is this Makefile robust? How can I make it more robust? Can someone provide a more robust version of this Makefile? It will be running on a 64 bit Red Hat Linux or CentOS machine.
If it matters, I am using:
-gcc --version 4.8.4 (From the GNU Compiler Collection)
-GDB version: GNU gdb (Ubuntu 7.7.1 -0ubuntu5~14.04.2) 7.7.1

I don't think your original makefile is far off the mark. I've just made a few additions:
Added a default all target - it's good to be explicit
Use the CXXFLAGS environment variable in all the calls to g++
Make main.o depend upon class1.h and class2.h as discussed
Specify that clean is a PHONY target just to be on the safe side if you add build artifact called clean
ALL := output
all : $(ALL)
output: main.o class1.o class2.o
g++ $(CXXFLAGS) main.o class1.o class2.o -o output
main.o: main.cpp class1.h class2.h
g++ $(CXXFLAGS) -c main.cpp
class1.o: class1.cpp class1.h
g++ $(CXXFLAGS) -c class1.cpp
class2.o: class2.cpp class2.h
g++ $(CXXFLAGS) -c class2.cpp
.PHONY : clean
clean:
rm *.o output

I would write something like
CXX = g++
# mandatory build flags
AM_CXXFLAGS = -Wall -W -std=gnu++11
# optional build flags
CXXFLAGS = -O2 -Werror
# mandatory link flags
AM_LDFLAGS = -Wl,-as-neeeded
output: main.o class1.o class2.o
${CXX} ${AM_LDFLAGS} ${LDFLAGS} $(filter %.o,$^) -o $#
%: %.cpp
${CXX} ${AM_CXXFLAGS} ${CXXFLAGS} $< -c -o $#
class1.o: class1.cpp class1.h
class2.o: class2.cpp class2.h
the *FLAGS are following automake notation: AM_* mean mandatory flags, the normal flags contain local settings (e.g. debugging or optimiziation).
Usually, AM_CPPFLAGS and CPPFLAGS with preprocessor flags (-I ...) should be used too but I omitted them here
the output target might need ${LIBS} too which have been omitted here
dependency tracking is more tricky and not implemented; you will have to play with -dM compiler option here...
When your program consists only of the listed 5 files, you can write
output_SOURCES = main.c class1.c class2.c class1.h class2.h
output: ${output_SOURCES}
${CXX} ${AM_CXXFLAGS} ${CXXFLAGS} ${AM_LDFLAGS} ${LDFLAGS} $(filter %.cpp,$^) -o $# ${LIBS}
directly.
EDIT:
For automatic dependency tracking, you can write
DEPGENFLAGS = \
-MD -MF ${#D}/.${#F}.d -MT '$#'
%: %.cpp
${CXX} ${DEPGENFLAGS} ${AM_CXXFLAGS} ${CXXFLAGS} $< -c -o $#
-include .deps.main.o.d
-include .deps.class1.o.d
-include .deps.class2.o.d

How can I make it more robust?
Use implicit rules, keep it simple.
LDLIBS+=-lstdc++
output: main.o class1.o class2.o
clean:
rm *.o output

Related

C++ makefile not linking

EXENAME = prog1
OBJS = link.o main.o
CXX = clang++
CXXFLAGS = -Wall -Wextra
LD = clang++
all : $(EXENAME)
$(EXENAME) : $(OBJS)
$(LD) $(OBJS) -o $(EXENAME)
main.o : link.h main.cpp
$(CXX) $(CXXFLAGS) main.cpp
link.o : link.h link.cpp
$(CXX) $(CXXFLAGS) link.cpp
clean :
-rm -f *.o $(EXENAME)
This is the make file I got but all the function in link can't be called in main. I tried many different ways doesn't work. This works
prog1: main.cpp link.h link.cpp
clang++ -Wall -Wextra -o prog1 main.cpp link.cpp
But I suppose is not the right way to do this?
It would help if you provided at least some of the errors you got (probably the first few).
Your compiler invocation for building object files is wrong. Without any other flags specified, the compiler will try to take all the input files and create an executable out of them. So this rule:
main.o : link.h main.cpp
$(CXX) $(CXXFLAGS) main.cpp
expands to this compilation line:
clang++ -Wall -Wextra main.cpp
The compiler will attempt to compile and link the main.cpp file (only, because that's all that's listed here) into an executable named a.out (by default).
You need to add the -c option to your compile lines if you want to build an object file rather than link a program:
main.o : link.h main.cpp
$(CXX) $(CXXFLAGS) -c main.cpp
Ditto for building link.o.
Even better would be to simply use make's built-in rules for compiling object files rather than writing your own; in that case your entire makefile could just be:
EXENAME = prog1
OBJS = link.o main.o
CXX = clang++
CXXFLAGS = -Wall -Wextra
all : $(EXENAME)
$(EXENAME) : $(OBJS)
$(CXX) $(CXXFLAGS) $(OBJS) -o $(EXENAME)
main.o : link.h
link.o : link.h
clean :
-rm -f *.o $(EXENAME)

Makefile, using mpiCC compiler for main.cpp and g++ for other functions of the src code

I have created a source code in C++ and I want to compile it by using makefiles. The problem is that I want my main functions to compile with mpiCC and the other functions to compile with g++. Is this possible?
What should I change in the following makefile?
Thanks in advance,
Ilias
.PHONY: all clean
CC=mpiCC #g++
CFLAGS=-c -O3
LOCAL_INC_PATH = ../include
SOURCES= main.cpp \
f1.cpp \
f2.cpp
OBJECTS=$(patsubst %.cpp,%.o,$(SOURCES))
LIP = $(LOCAL_INC_PATH)
HEADERS = $(LIP)/func_all.h
all: $(OBJECTS)
$(CC) $^ -o MIE -I$(LOCAL_INC_PATH)
%.o: %.cpp
$(CC) $(CFLAGS) $^ -I$(LOCAL_INC_PATH)
clean:
rm *.$(OBJECTS)
You can put an additional explicit rule for main.cpp:
# ...
CC=g++
# ...
SOURCES= f1.cpp \
f2.cpp
OBJECTS=$(patsubst %.cpp,%.o,$(SOURCES)) main.o
# ...
main.o : main.cpp
mpiCC $(CFLAGS) $^ -I$(LOCAL_INC_PATH)
# ...
It is possible, of course.
CC=g++ # compile everything with g++
main.o : CC=mpiCC # compile main.o with mpiCC
The above uses target-specific variables. When compiling main.o it replaces the value of CC with mpiCC.
Please note, the convention is that CC variable is the C compiler, whereas CXX is the C++ one. Same applies to flags, CFLAGS vs CXXFLAGS.

GCC linking a static library

I have seen questions like these on SO but everyone has different answers and directory structures that aren't working for me.
My makefile:
CC = g++
DEBUG = -g -std=c++11
TARGET = main
OBJECT_FILES = BingResultSet.o main.o
INC_PATH = -I HTTPClientLib/include
LIB_PATH = -L HTTPClientLib/lib/
start: clean BingResultSet.o main.o
$(CC) $(DEBUG) $(INC_PATH) $(LIB_PATH) $(OBJECT_FILES) -o $(TARGET)
rm -f *.o
BingResultSet.o: BingResultSet.cpp BingResultSet.h
$(CC) $(DEBUG) $(INC_PATH) $(LIB_PATH) -c BingResultSet.cpp
main.o: main.cpp
$(CC) $(DEBUG) $(INC_PATH) $(LIB_PATH) -c main.cpp
clean:
rm -f $(OBJECT_FILES) $(TARGET)
My file structure:
/Desktop/DataMiner/.cpp, .h, and makefile
/Desktop/DataMiner/HTTPClientLib/include/HTTPClient.h
/Desktop/DataMiner/HTTPClientLib/lib/HTTPClient.a
What's the correct way to link my static lib in my makefile?
Here's my $0.02:
there was no static library involved. Assuming you meant the .o files
you mix dependencies and build rules, instead, avoid repeating build rules:
$(TARGET): $(OBJECT_FILES)
$(CXX) $(DEBUG) $(INC_PATH) $^ -o $# $(LIB_PATH)
%.o: %.cpp
$(CXX) $(DEBUG) $(INC_PATH) -c $< -o $#
You used CC for a C++ compiler. That's strange. Use CXX
You used LDFLAGS when you were just compiling
You hardcoded the source and destination paths. Instead use the automatic variables ($^, $< for source; $# for destination)
You tried to hardcode header dependencies. That's error-prone and messes up source specification (you don't want $^ to list .h files in your command line...). Instead, use gcc -MM¹ to generate the dependencies for you!
Next, do a conditional include of those dependencies:
.depends:
$(CXX) -MM $(CXXFLAGS) -c *.cpp > $#
-include .depends
It's usually handy to keep the .o files so you can speed up builds. Of course, this was not a good plan until you generated the header dependencies automatically. If you insist, you can comment the .PRECIOUS target. Intermediate targets are automatically deleted by GNU Make
Here's the integrated offering I ended up with:
CXX = g++
TARGET = main
OBJECT_FILES = BingResultSet.o main.o
INC_PATH = -I HTTPClientLib/include
LIB_PATH = -L HTTPClientLib/lib/
CPPFLAGS = -g -std=c++11
CPPFLAGS+= $(INC_PATH)
# standard derived flags:
CXXFLAGS+=$(CPPFLAGS)
LDFLAGS+=$(LIB_PATH)
start: .depends $(TARGET)
$(TARGET): $(OBJECT_FILES)
$(CXX) $(CXXFLAGS) $^ -o $# $(LDFLAGS)
%.o: %.cpp
$(CXX) $(CXXFLAGS) -c $< -o $#
clean:
rm -f .depends $(OBJECT_FILES) $(TARGET)
# to keep the .o files:
.PRECIOUS: $(OBJECT_FILES)
.depends:
$(CXX) -MM $(CXXFLAGS) -c *.cpp > $#
-include .depends
On a very simple sample set of files you get:
$ make clean
rm -f .depends BingResultSet.o main.o main
$ make
g++ -MM -g -std=c++11 -I HTTPClientLib/include -c *.cpp > .depends
g++ -I HTTPClientLib/include -c BingResultSet.cpp -o BingResultSet.o
g++ -I HTTPClientLib/include -c main.cpp -o main.o
g++ -I HTTPClientLib/include BingResultSet.o main.o -o main -L HTTPClientLib/lib/
$ cat .depends
BingResultSet.o: BingResultSet.cpp BingResultSet.h
main.o: main.cpp BingResultSet.h
test.o: test.cpp
¹ (or similar, see man-page)

Makefile - Erro: file truncated

i have a simple Makefile:
CC=g++
CFLAGS= -Wall -std=c++11 -M -MF dependencyFileName.d -c
objects = Table.o LimitedTable.o aDimension.o test.o
edit: $(objects)
g++ -o edit $(objects)
test.o: LimitedTable.o Table.o aDimension.o test.cpp
$(CC) $(CFLAGS) test.cpp -o test.o
LimitedTable.o: LimitedTable.cpp LimitedTable.hpp Table.o aDimension.o
$(CC) $(CFLAGS) LimitedTable.cpp -o LimitedTable.o
aDimension.o: aDimension.cpp aDimension.cpp Table.o
$(CC) $(CFLAGS) aDimension.cpp -o aDimension.o
Table.o: Table.cpp Table.hpp
$(CC) $(CFLAGS) Table.cpp -o Table.o
clean:
rm -f *.o
and I get this error:
marius#marius-Lenovo-Y50-70 ~/Documents $ make clean
rm -f *.o
marius#marius-Lenovo-Y50-70 ~/Documents $ make edit
g++ -Wall -std=c++11 -M -MF dependencyFileName.d -c Table.cpp -o Table.o
g++ -Wall -std=c++11 -M -MF dependencyFileName.d -c aDimension.cpp -o aDimension.o
g++ -Wall -std=c++11 -M -MF dependencyFileName.d -c LimitedTable.cpp -o LimitedTable.o
g++ -Wall -std=c++11 -M -MF dependencyFileName.d -c test.cpp -o test.o
g++ -o edit Table.o LimitedTable.o aDimension.o test.o
Table.o: file not recognized: File truncated
collect2: error: ld returned 1 exit status
make: *** [edit] Error 1
Can anyone tell me what is wrong ?
Could a wrong include in one of the files be a reason for this error ?
There are some problems with the way you handle your dependency file, but first:
I have a simple Makefile
No you don't. The amount of boilerplate code is way too high, and adding any file to your projet will require you to manually edit that makefile again.
Your Makefile should be boiled down to this:
SRC := $(wildcard *.cpp)
OBJ := $(SRC:.cpp=.o)
DEP := $(OBJ:.o=.d)
CPPFLAGS := -MMD -MP
CXXFLAGS := -std=c++11 -Wall
edit: $(OBJ)
$(CXX) $^ -o $#
-include $(DEP)
clean:
$(RM) $(OBJ) $(DEP)
Here you :
avoid repeating yourself too much,
make good use of make's implicit rules to save time,
use the right built-in variables instead of overriding the wrong ones,
correctly handle dependency files creation and actually use them to prevent manual recompilation,
won't need to edit the makefile when adding a .cpp or .hpp file to your project.
Also, that should fix your problem. Don't forget to clean before trying to compile again after such an error ("file truncated") occurred.

Problem with makefile making .gch files instead of.o files

So, I'm making a program to test the efficiency of certain data structures. I have all the .h files and I made a very terrible makefile that probably is wrong, although it seems to work up to a point. Instead of making .o files it makes .gch files, so when it tries to acces all the .o files they are not found. This is my makefile
prog1: main.o dsexceptions.o BinarySearchTree.o SplayTree.o RedBlackTree.o AvlTree.o
g++ -Wall -g -o prog1 main.o dsexceptions.h.gch BinarySearchTree.h.gch SplayTree.h.gch RedBlackTree.h.gch AvlTree.h.gch
main.o: main.cpp AvlTree.h RedBlackTree.h SplayTree.h BinarySearchTree.h dsexceptions.h
g++ -Wall -g -c main.cpp
#shape.o: shape.cpp shape.h grid.h
# g++ -Wall -g -c shape.cpp
dsexceptions.o: dsexceptions.h
g++ -Wall -g -c dsexceptions.h
BinarySearchTree.o: BinarySearchTree.h dsexceptions.h
g++ -Wall -g -c BinarySearchTree.h
SplayTree.o: SplayTree.h dsexceptions.h
g++ -Wall -g -c SplayTree.h
RedBlackTree.o: RedBlackTree.h dsexceptions.h
g++ -Wall -g -c RedBlackTree.h
AvlTree.o: AvlTree.h dsexceptions.h
g++ -Wall -g -c AvlTree.h
clean:
rm -f main main.exe main.o dsexceptions.o BinarySearchTree.o SplayTree.o RedBlackTree.o AvlTree.o *.gch
You don't want to feed your .h files to the compiler. Only compile the .cpp file, which should include your .h files. (The .gch files are precompiled headers.) You don't need .o files for your headers, just #include them in your .cpp file.
prog1: main.o
g++ -Wall -g -o prog1 main.o
main.o: main.cpp AvlTree.h RedBlackTree.h SplayTree.h BinarySearchTree.h dsexceptions.h
g++ -Wall -g -c main.cpp
clean:
rm -f prog1 main.o
You already have the solution from bstpierre, but just for fun here's my version of your makefile:
CC = g++ -Wall -g -o $#
MODULE = AvlTree BinarySearchTree RedBlackTree SplayTree
OBJECTS = $(addsuffix .o,$(MODULES))
prog1: main.o dsexceptions.o $(OBJECTS)
$(CC) $^
main.o: $(addsuffix .h,$(MODULES))
$(OBJECTS) main.o : %.cpp %.h dsexceptions.h
$(CC) -c $&lt
clean:
rm -f main main.exe *.o *.gch
And just for good measure, here is my SConstruct, because SCons's so much better :)
Program('main.cpp') # Yeah, it's that simple :)
You can look at SCons here.