I have a makefile as follows:
# Makefile for VocabLearn
MACHTYPE=$(shell uname -m)
GCC = g++
CC=gcc
# OPTFLAGS=-g2
OPTFLAGS=-O3 -ffast-math -Wall -mfpmath=sse -msse2 -funroll-loops -march=core2
OTHERFLAGS=-Wall -fopenmp
INCLUDE_PATH=-I../lib/ann_1.1/include/ANN -I../lib/ann_1.1_char/include/ANN \
-I../lib/imagelib -I../VocabLib -I../lib/zlib/include
LIB_PATH=-L../lib -L../VocabLib -L../lib/zlib/lib
OBJS=VocabLearn.o
LIBS=-lvocab -lANN -lANN_char -limage -lz
CPPFLAGS=$(INCLUDE_PATH) $(LIB_PATH) $(OTHERFLAGS) $(OPTFLAGS)
BIN=VocabLearn
all: $(BIN)
$(BIN): $(OBJS)
g++ -o $(CPPFLAGS) -o $(BIN) $(OBJS) $(LIBS)
clean:
rm -f *.o *~ $(LIB)
When I 'make' it in the prompt, it works fine and output the following info:(I use Mac OS, c++ means clang compiler)
c++ -I../lib/ann_1.1/include/ANN -I../lib/ann_1.1_char/include/ANN
-I../lib/imagelib -I../VocabLib -I../lib/zlib/include -L../lib -L../VocabLib -L../lib/zlib/lib -Wall -fopenmp -O3 -ffast-math -Wall -mfpmath=sse -msse2 -funroll-loops -march=core2 -c -o VocabLearn.o VocabLearn.cpp
g++ -o -I../lib/ann_1.1/include/ANN -I../lib/ann_1.1_char/include/ANN
-I../lib/imagelib -I../VocabLib -I../lib/zlib/include -L../lib -L../VocabLib -L../lib/zlib/lib -Wall -fopenmp -O3 -ffast-math -Wall -mfpmath=sse -msse2 -funroll-loops -march=core2 -o VocabLearn VocabLearn.o -lvocab -lANN -lANN_char -limage -lz
I just want to know how this makefile works. As you can see, since this makefile doesn't specify which source code to compile, how does the compiler know it is 'VocabLearn.cpp' that it should process? (My guess is that it will search source file according to the name of the object file, VocabLearn.o) Also this line seems a bit strange for me:
g++ -o $(CPPFLAGS) -o $(BIN) $(OBJS) $(LIBS)
Why is there a '-o' before '$(CPPFLAGS)'?
This makefile is using implicit rules to compile the source files. The rule:
$(BIN): $(OBJS)
asks for the object files in OBJS, and make already knows how to build VocabLearn.o if there is a file VocabLean.cpp.
Basically there is an implicit rule to convert *.cpp files to *.o files, however you have to have *.o as a dependency in one your targets. In the given Makefile, you have VocabLearn.o as a dependency for $(BIN). So, VocabLearn.o gets auto-generated from VocabLearn.cpp file.
Related
I have trouble creating dependency files while using make re. The %.d pattern rule will be called before fclean, also only the %.o pattern rule were called by all after fclean.
Here is the output when i use make vs make re:
mkdir -p srcs/depends
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -MM srcs/tests.cpp -o srcs/depends/tests.d
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -MM srcs/main.cpp -o srcs/depends/main.d
mkdir -p srcs/obj
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/main.cpp -o srcs/obj/main.o
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/tests.cpp -o srcs/obj/tests.o
c++ -lstdc++ srcs/obj/main.o srcs/obj/tests.o -o main
vs (make re)
rm -f -rv srcs/obj srcs/depends
srcs/obj/main.o
srcs/obj/tests.o
srcs/obj
srcs/depends/main.d
srcs/depends/tests.d
srcs/depends
rm -f main
mkdir -p srcs/obj
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/main.cpp -o srcs/obj/main.o
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/tests.cpp -o srcs/obj/tests.o
c++ -lstdc++ srcs/obj/main.o srcs/obj/tests.o -o main
My makefile:
NAME = main
SRCSDIR = srcs
SRCS = $(wildcard $(SRCSDIR)/*.cpp)
OBJSDIR = srcs/obj
OBJS = $(SRCS:$(SRCSDIR)/%.cpp=$(OBJSDIR)/%.o)
DEPENDSDIR = srcs/depends
DEPENDS = $(SRCS:$(SRCSDIR)/%.cpp=$(DEPENDSDIR)/%.d)
CPPFLAGS = -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes
DEPFLAGS = -MM
LDFLAGS = -lstdc++
all: $(NAME)
$(NAME): $(OBJS)
c++ $(LDFLAGS) $^ -o $#
$(OBJSDIR)/%.o: $(SRCSDIR)/%.cpp | $(OBJSDIR)
c++ $(CPPFLAGS) -c $< -o $#
$(DEPENDSDIR)/%.d: $(SRCSDIR)/%.cpp | $(DEPENDSDIR)
c++ $(CPPFLAGS) $(DEPFLAGS) $< -o $#
$(OBJSDIR) $(DEPENDSDIR):
mkdir -p $#
-include $(DEPENDS)
clean:
$(RM) -rv $(OBJSDIR) $(DEPENDSDIR)
fclean: clean
$(RM) $(NAME)
re: fclean all
.PHONY: all clean fclean re
I have looked up the gnu make documentation and couldn't find any details. (Maybe I don't know where to look it up). Anybody knows why or are there any other cleaner solution to this ? Thanks in advance
You are using the old-style header file generation method where make builds dependency files, then re-execs itself to read in the changed dependencies. So, when you run make first it parses all the .d files that currently exist (due to the include line) then it tries to rebuild the .d files, then if any have changed it re-execs, then it runs the rest of the makefile. Once it loads all the .d files and determines that they're up to date, make is done with them (for that invocation). If they later get deleted, it's not going to try to recreate them. They will be recreated the next time make is run.
In general, it's a bad idea to have a rule that runs clean and all as prerequisites. What if you enable parallel builds? Now make is running the clean and all rules in parallel. If you want to do this, you need to invoke them as sub-makes rather than via prerequisites, like this:
re:
$(MAKE) fclean
$(MAKE) all
This will ensure each target is built serially, even with parallel builds, and that make will be started from scratch to build all.
Another thing you should consider is using a more modern form of dependency generation; for example: https://make.mad-scientist.net/papers/advanced-auto-dependency-generation/
I am working on the project which has to include the CPLEX tool at some point.
More in detail, I have the following classes implemented
(i.e. the corresponding files): Random.cpp, Instance.cpp, Timer.cpp. Solution.cpp which are included into Hybrid_ea.cpp which also have to include cplex library.
Finally, the project has been executed by running Algorithm.cpp (the main() function defined here).
I want to run the project on Linux platform, creating Makefile which looks like:
TARGET = Algorithm
CXXFLAGS = -ansi -O3
GENOBJS = Random.o
#CPLOBJS = Timer.o Random.o Instance.o Hybrid_ea.o
GREOBJS = Timer.o Random.o Instance.o Solution.o Hybrid_ea.o
SYSTEM = x86-64_linux
LIBFORMAT = static_pic
CPLEXDIR = /home/root/Desktop/projects/software/cplex-12.5/cplex
CONCERTDIR = /home/root/Desktop/projects/software/cplex-12.5/concert
CCC = g++
CCOPT = -m64 -O -fPIC -fexceptions -DNDEBUG -DIL_STD -std=c++11 -fpermissive -w
CPLEXBINDIR = $(CPLEXDIR)/bin/$(BINDIST)
CPLEXLIBDIR = $(CPLEXDIR)/lib/$(SYSTEM)/$(LIBFORMAT)
CONCERTLIBDIR = $(CONCERTDIR)/lib/$(SYSTEM)/$(LIBFORMAT)
CCLNFLAGS = -L$(CPLEXLIBDIR) -lilocplex -lcplex -L$(CONCERTLIBDIR) -lconcert -lm -pthread
CLNFLAGS = -L$(CPLEXLIBDIR) -lcplex -lm -pthread
CONCERTINCDIR = $(CONCERTDIR)/include
CPLEXINCDIR = $(CPLEXDIR)/include
CCFLAGS = $(CCOPT) -I$(CPLEXINCDIR) -I$(CONCERTINCDIR)
all: ${TARGET}
Algorithm: Algorithm.o $(GREOBJS)
$(CCC) $(CCFLAGS) Algorithm.o $(GREOBJS) -o Algorithm $(CCLNFLAGS)
Algorithm.o: Algorithm.cpp
$(CCC) -c $(CCFLAGS) Algorithm.cpp -o Algorithm.o
clean:
#rm -f *~ *.o ${TARGET} core
The linking process is somehow wrong. I checked, my CPLEX version is the right one since the others, simpler projects can be executed;
The full output given when trying to compile the project:
g++ -c -m64 -O -fPIC -fexceptions -DNDEBUG -DIL_STD -std=c++11 -fpermissive -w -I/home/root/Desktop/projects/LCAPS_software/cplex-12.5/cplex/include -I/home/root/Desktop/projects/LCAPS_software/cplex-12.5/concert/include Algorithm.cpp -o Algorithm.o
g++ -ansi -O3 -c -o Timer.o Timer.cc
g++ -ansi -O3 -c -o Random.o Random.cc
g++ -ansi -O3 -c -o Instance.o Instance.cpp
g++ -ansi -O3 -c -o Solution.o Solution.cpp
g++ -ansi -O3 -c -o hybrid_ea.o hybrid_ea.cpp
In file included from hybrid_ea.cpp:22:0:
hybrid_ea.h:39:10: fatal error: ilcplex/ilocplex.h: No such file or directory
#include <ilcplex/ilocplex.h>
^~~~~~~~~~~~~~~~~~~~
compilation terminated.
<builtin>: recipe for target 'hybrid_ea.o' failed
make: *** [hybrid_ea.o] Error 1
Any help would be appreciated.
Only the file Algorithm.cpp is compiled with appropriate options for finding the CPLEX include files:
-I/home/root/Desktop/projects/LCAPS_software/cplex-12.5/cplex/include
-I/home/root/Desktop/projects/LCAPS_software/cplex-12.5/concert/include
As hybrid_ea.h also tries to include some CPLEX header files, the compilation of hybrid_ea.cpp should also have the options above.
If the makefile that you posted in your question is complete, then I suspect that the issue is the following: you didn't define a specific command to compile any .cc or .cpp file, except for Algorithm.cpp. Therefore, all other files are compiled using a default command g++ -ansi -O3 -c -o [file].o [file].cpp. And this default command doesn't have the include directives for the location of the CPLEX libraries.
As explained in ftp://ftp.gnu.org/old-gnu/Manuals/make-3.79.1/html_chapter/make_10.html, these files are compiled using make's implicit rules. The implicit rule for C++ files is to use $(CXX) -c $(CPPFLAGS) $(CXXFLAGS). Notice how this rule uses CPPFLAGS and CXXFLAGS rather than the variable CCFLAGS that you defined at the end of your makefile to include the proper include directives.
So changing the end of your makefile to the following should work:
CPPFLAGS = $(CCOPT) -I$(CPLEXINCDIR) -I$(CONCERTINCDIR)
all: ${TARGET}
Algorithm: Algorithm.o $(GREOBJS)
$(CCC) $(CCFLAGS) Algorithm.o $(GREOBJS) -o Algorithm $(CCLNFLAGS)
clean:
#rm -f *~ *.o ${TARGET} core
Once you define the variable CPPFLAGS, it will be used automatically to compile any .cpp file that you have in your project.
I am trying yo build a Makefile for a project that uses the soplex library (which also depends on libz and libgmp).
So I have this little Makefile:
SOPLEXPATH =../../lib/soplex-3.0.0/lib/
SOPLEXINCLUDE =../../lib/soplex-3.0.0/src/
SOPLEXDEP =../../lib/soplex-3.0.0/src/
CC = g++
CPPFLAGS = -g -std=c++0x -O3 -I $(SOPLEXINCLUDE)
#CPPFLAGS += -DNDEBUG
CPPFLAGS += -pg -ggdb
CPPFLAGS += -Wall -Werror=return-type
LIBS = -L $(SOPLEXPATH) -lz -lgmp -lsoplex
SRCS = $(wildcard ./src/core/*.cpp)
OBJS = $(addsuffix .o, $(basename $(SRCS)))
DEPS = $(addsuffix .d, $(basename $(SRCS)))
all : kea
kea : $(OBJS)
$(CC) $(CPPFLAGS) $(LIBS) -o bin/kea-core $(OBJS)
clean :
rm -f bin/kea-core $(OBJS) $(DEPS) *~
-include $(DEPS)
%.d: %.c
#$(CC) -MM -MT $(subst .d,.o,$#) -MT $# $(CPPFLAGS) $< > $#
And all seems to compile to object files (.o) correctly, but then the linker complains about not finding the function soplex::SoPlex::SoPlex() (the constructor of SoPlex):
g++ -g -std=c++0x -O3 -I ../../lib/soplex-3.0.0/src/ -pg -ggdb -Wall -Werror=return-type -c -o src/core/ecircuit.o src/core/ecircuit.cpp
g++ -g -std=c++0x -O3 -I ../../lib/soplex-3.0.0/src/ -pg -ggdb -Wall -Werror=return-type -c -o src/core/solver_soplex.o src/core/solver_soplex.cpp
g++ -g -std=c++0x -O3 -I ../../lib/soplex-3.0.0/src/ -pg -ggdb -Wall -Werror=return-type -c -o src/core/main.o src/core/main.cpp
g++ -g -std=c++0x -O3 -I ../../lib/soplex-3.0.0/src/ -pg -ggdb -Wall -Werror=return-type -L ../../lib/soplex-3.0.0/lib/ -lz -lgmp -lsoplex -o bin/kea-core ./src/core/ecircuit.o ./src/core/solver_soplex.o ./src/core/main.o
./src/core/solver_soplex.o: In function `SolvSoplex::SolvSoplex(ECircuit&, std::vector<std::pair<int, int>, std::allocator<std::pair<int, int> > >&, SolvSoplex::Mode)':
/home/diego/Projects/kea-landscape-tool/src/core/solver_soplex.cpp:9: undefined reference to `soplex::SoPlex::SoPlex()'
/home/diego/Projects/kea-landscape-tool/src/core/solver_soplex.cpp:9: undefined reference to `soplex::SoPlex::~SoPlex()'
collect2: error: ld returned 1 exit status
Makefile:20: recipe for target 'kea' failed
make: *** [kea] Error 1
Since all the .o files are created I tried to compile by hand doing:
g++ -g -std=c++0x -O3 -I ../../lib/soplex-3.0.0/src/ -Wall -Werror=return-type -pg -ggdb -L/home/diego/Projects/kea-landscape-tool/../../lib/soplex-3.0.0/lib/ -lsoplex -lz -lgmp -o bin/kea-core src/core/main.o src/core/ecircuit.o src/core/solver_soplex.o
And it failed with the same error.
then I tried switching the position of the -L and -l.. flags like this, and it compiled: g++ -g -std=c++0x -O3 -I ../../lib/soplex-3.0.0/src/ -Wall -Werror=return-type -pg -ggdb -o bin/kea-core src/core/main.o src/core/ecircuit.o src/core/solver_soplex.o -L/home/diego/Projects/kea-landscape-tool/../../lib/soplex-3.0.0/lib/ -lsoplex -lz -lgmp
Seeing that, I tried to change the rule in the Makefile as follows:
kea : $(OBJS)
$(CC) $(CPPFLAGS) -o bin/kea-core $(OBJS) $(LIBS)
But it just failed miserably triggering about 100 errors all inside soplex.cpp (as in, it depends on -lgmp and -lz, but it could not find them? Too long to paste here)
I am pretty confused, any idea on how to fix this?
thanks.
Try putting the $LIBS at the end of the command.
Change this:
LIBS = -L $(SOPLEXPATH) -lz -lgmp -lsoplex
Into this:
LIBS = -L $(SOPLEXPATH) -lsoplex -lgmp -lz
You always need to put B after A, if A calls functions in B. With static libraries as least.
Here is makefile:
CC=g++
CC_FLAGS=-Wall -march=native -ffast-math -O3
CC_SOURCES=AbsNode.cpp rle16.cpp
CC_OBJECTS=AbsNode.o rle16.o
# Link command:
test : $(CC_OBJECTS)
$(CC) $(CC_OBJECTS) -o test
# Compilation commands:
%.o:%.cpp
$(CC) -c $(CC_FLAGS) $(input) -o $(output)
when applying make to this makefile, I get the following output:
g++ -c -Wall -march=native -ffast-math -O3 -o
g++: arguemnt to '-o' missing
Why are inputs and outputs ignored???
You haven't defined the variables input and output anywhere. The computer is not a magic box that can guess your intentions.
Your .cpp -> .o implicit rule is incorrect:
%.o: %.cpp
$(CC) -c $(CC_FLAGS) $< -o $#
$< is set by make to be the source file
$# will be the output file name
can compiler options be applied selectively on my files?
I want some files to be covered by some option but not the other files.
Guessing that you might be using Make files:
This should get you started: Note how -fopenmp gets added just for source2.c
CC=gcc
SRC=source1.c source2.c
OBJ=$(patsubst %.c,%.o,$(SRC))
EXE=source1.exe
FLAGS= -g -O2
source2.o: FLAGS+=-fopenmp
all: $(EXE)
$(EXE): $(OBJ)
$(CC) -o $# $^ $(FLAGS)
%.o: %.c
$(CC) -c -o $# $^ $(FLAGS)
clean:
rm $(EXE)$
Output of make -Bsn:
gcc -o source1.o source1.c -g -O2
gcc -o source2.o source2.c -g -O2 -fopenmp
gcc -o source1 source1.o source2.o -g -O2
Of course. You invoke the compiler, and you can tell it what you want.
Some tools may add some restrictions; Visual Studio, as far as I know, only allows specifying options at the project level. But that's an artificial restriction of the tool (and I'm sure there are ways around it—I just don't know them).