I am trying to compile some C to run on a friendlyARM for days now without any luck, i think im close but getting this error:
kevin#kevin-VirtualBox:~/Desktop/makef$ make
arm-none-linux-gnueabi-gcc -c -o obj/main.o main.c -I./
as: unrecognized option '-mcpu=arm1176jzf-s'
make: *** [obj/main.o] Error 1
Does anyone know how to what this error means and how to fix it?
steps i have tried:
1
touch *.*
make clean
make
(error as: unrecognized option '-mcpu=arm1176jzf-s)
2
touch *.*
make clean
make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi-l
(error as: unrecognized option '-mcpu=arm1176jzf-s)
the Makefile :
IDIR =./
CC=arm-none-linux-gnueabi-gcc
CFLAGS=-I$(IDIR)
ODIR=obj
LDIR =./
LIBS=-lgd -lrt
_DEPS = main.h Makefile
DEPS = $(patsubst %,$(IDIR)/%,$(_DEPS))
_OBJ = main.o serial.o fb.o menu_main.o timer.o cmdin.o buzzer.o statemachine.o inout.o network.o text_file_input.o text_file_input_oven.o
OBJ = $(patsubst %,$(ODIR)/%,$(_OBJ))
$(ODIR)/%.o: %.c $(DEPS)
$(CC) -c -o $# $< $(CFLAGS)
main: $(OBJ)
$(CC) -o $# $^ $(CFLAGS) $(LIBS)
.PHONY: clean
clean:
rm -f $(ODIR)/*.o *~ core $(INCDIR)/*~
It means the version of gcc that you have installed does not understand the option -mcpu=arm1176jzf-s
Either you have an older version of gcc which does not accept that option, or you have a version of gcc that has cross compiling support turned off.
Related
I am trying to build a Makefile that will build a shared library with g++ and I find that it is not evaluating the OBJECTS variable. This is on Ubuntu 18.04 and all the files are in the same current directory. Secondly it is completely skipping the source file compilation and proceeding directly to evaluate the linking instruction. As a clarification I am using GNU Make 4.1
Here is what I get when I type make all
g++ -shared -pthread -o tree.so
g++: fatal error: no input files
compilation terminated.
Makefile:12: recipe for target 'tree.so' failed
make: *** [tree.so] Error 1
Here is my Makefile code
CC=g++
CFLAGS = -I/usr/local/include -Wall -std=c++17 -O3 -march=native -Ofast -ftree-vectorize
LIBS=-shared -pthread
SOURCES=$(wildcard *.cpp)
OBJECTS=$(wildcard *.o)
TARGET=tree.so
all:$(TARGET)
$(TARGET) : $(OBJECTS)
$(CC) $(LIBS) -o $(OBJECTS) $(TARGET)
$(OBJECTS):$(SOURCES)
$(CC) -c -g $(CFLAGS) $(SOURCES)
clean:
rm -f $(OBJECTS) $(TARGET)
If you only have the *.cpp files in your directories, then there is not any *.o yet, so your $(wildcard *.o) will expand to nothing.
What you want is to get the *.cpp files and compute the corresponding *.o files:
OBJECTS=$(patsubst %.cpp,%.o,$(SOURCES))
or equivalently:
OBJECTS=$(SOURCES:.cpp=.o)
Now, your compiler command is not the best one, because if you touch any source file all will be compiled. You can use instead:
$(OBJECTS): %.o: %.cpp
$(CC) -c -g $(CFLAGS) $< -o $#
So that only the touched files are actually rebuilt.
Also you have the linking command wrong. It should be:
$(TARGET) : $(OBJECTS)
$(CC) $(LIBS) -o $(TARGET) $(OBJECTS)
because the argument to the -o option is the output file, that is the target.
I am trying to compile my C++ code using the GNU compiler under Linux using the following Makefile
CXX=gcc #icpc
RM=rm -f
CPPFLAGS=-g -O3 -fopenmp
CFLAGS= -Wall -c
OPENMP = -fopenmp
BIN = theVeecode_$(CXX)
LIBS= -L /path-to-boost/boost_1_53_0/stage/lib/ -lboost_regex
CPPSRCS=mathtools.cpp time_.cpp read_input.cpp vee_ao_calc.cpp vee_mo_calc.cpp write_int2e.cpp memory_check.cpp
OBJS=$(subst .cpp,.o,$(CPPSRCS))
OBJS+=$(COBJS)
all: $(BIN)
$(BIN): $(OBJS)
$(CXX) main.cpp $(OPENMP) -o $(BIN) $(OBJS) $(LIBS)
clean:
$(RM) $(OBJS) $(BIN)
dist-clean: clean
$(RM) $(BIN)
When I run the make command, I get the following error messages:
gcc -g -O3 -fopenmp -c -o read_input.o read_input.cpp
read_input.cpp:9:27: error: boost/regex.hpp: No such file or directory
read_input.cpp: In function 'void input::read_n_occ()':
read_input.cpp:95: error: 'boost' has not been declared
read_input.cpp:95: error: 'regex_search' was not declared in this scope
make: *** [read_input.o] Error 1
The read_input.cpp file starts with
#... // other includes
#include <boost/regex.hpp>
using namespace std;
namespace xxx
{
//some code here
}
The library path "/path-to-boost/boost_1_53_0/stage/lib/" contains the files
libboost_regex.a, libboost_regex.so and libboost_regex.so.1.53.0.
I don't understand why the compiler doesn't find the library files. Does anyone have any ideas why it's not working and how to fix it?
Thanks in advance.
As it turned out, the problem was in the Makefile. More specifically, the path to the boost library was not included during the compilation of the .cpp files using boost. Fixed it by adding the library explicitly in the compilation step:
%.o: %.cpp $(DEPS)
$(CXX) -c -o $# $< $(CPPFLAGS) $(LIBS)
Finally, the Makefile is as follows:
CXX=gcc #icpc
RM=rm -f
CPPFLAGS=-g -O3 -fopenmp
OPENMP = -fopenmp
BIN = theVeecode_$(CXX)
LIBS= -I /path-to-boost/boost_1_53_0/
LIBS+= -L /path-to-boost/boost_1_53_0/stage/lib/ -lboost_regex
CPPSRCS=mathtools.cpp time_.cpp read_input.cpp vee_ao_calc.cpp vee_mo_calc.cpp write_int2e.cpp memory_check.cpp
OBJS=$(subst .cpp,.o,$(CPPSRCS))
DEPS=Vector3.h mathtools.h memory_check.h read_input.h time_.h vee_ao_calc.h vee_mo_calc.h write_int2e.h
%.o: %.cpp $(DEPS)
$(CXX) -c -o $# $< $(CPPFLAGS) $(LIBS)
$(BIN): $(OBJS)
$(CXX) main.cpp $(OPENMP) -o $(BIN) $(OBJS) $(LIBS)
clean:
$(RM) $(OBJS) $(BIN)
dist-clean: clean
$(RM) $(BIN)
To get the word out there;
For my case, I was missing the libboost-dev package.
On debian, you can install it with sudo apt install libboost-dev
I'm trying to compile a simple program from the terminal that utilizes the condition_variable class. Upon building, I get the following error:
This file requires compiler and library support for the ISO C++ 2011 standard. This support is currently experimental, and must be enabled with the -std=c++11 or -std=gnu++11 compiler options.
In researching this error here, I added the necessary flag to my make file, but I'm still getting the same error.
Here is my makefile:
CXX= g++ $(CCFLAGS)
MAIN= main.o
DATACLASS= dataclass.o
OBJS = $(MAIN) $(DATACLASS)
LIBS= -pthread
CCFLAGS= -g -std=c++11
all: main
main: $(MAIN) $(DATACLASS)
$(CXX) -o main $(MAIN) $(DATACLASS) $(LIBS)
dataclass: $(DATACLASS)
$(CXX) -o dataclass $(DATACLASS) $(LIBS)
clean:
rm -f $(OBJS) $(OBJS:.o=.d)
realclean:
rm -f $(OBJS) $(OBJS:.o=.d) main
%.d: %.cc
$(SHELL) -ec '$(CC) -M $(CPPFLAGS) $< \
| sed '\''s/\($*\)\.o[ :]*/\1.o $# : /g'\'' > $#; \
[ -s $# ] || rm -f $#'
include $(OBJS:.o=.d)
I'm sure I'm missing something small and stupid as I'm new to makefiles, but any help would be greatly appreciated.
Rewrite CXX to CXX = g++
Change CCFLAGS to CXXFLAGS = -g -std=c++11, and
Rewrite your rules to $(CXX) $(CXXFLAGS) ....
$(CXX) $(CXXFLAGS) will then be replaced with g++ -g -std=c++11. This is more of a standard method for defining a makefile. Here is a snippet of the resulting makefile.
CXX = g++
MAIN = main.o
DATACLASS = dataclass.o
OBJS = $(MAIN) $(DATACLASS)
LIBS = -pthread
CXXFLAGS = -g -std=c++11
all: main
main: $(OBJS)
$(CXX) $(CXXFLAGS) $? -o $# $(LIBS)
As a side note, are you sure this rule should be defined as such?
dataclass: $(DATACLASS)
$(CXX) $(CXXFLAGS) $? -o $# $(LIBS)
Should the target not be dataclass.o or $(DATACLASS) and the prerequisite some other file?
Note: I've also included some make automatic variables to tidy up the makefile rules.
$? - is replaced by all prerequisites
$# - is replaced by the target name
(On Linux, trying to set up SDL) I'm having a time with makefiles, I'm finding them hard to learn. Here is the error I'm getting.
g++: error: game.exe: No such file or directory
make: *** [game.exe] Error 1
Here is my makefile. (Any suggestions on making it better would be great. I've just kind of slapped together whatever I could find to work.)
#Game Make file
TARGET = game.exe
OBJS = App.o\
App_OnInit.o\
App_OnEvent.o\
App_OnLoop.o\
App_OnRender.o \
App_OnCleanup.o\
SDL_CFLAGS := $(shell sdl-config --cflags)
SDL_LDFLAGS := $(shell sdl-config --libs)
CFLAGS = -Wall -o
LIBS =
LDFLAGS =
$(TARGET): $(OBJS)
g++ $(CFLAGS) $(SDL_CFLAGS) $# $(LDFLAGS) $(OBJS) $(SDL_LDFLAGS) $(LIBS)
%.o: src/%.cpp
g++ -c $(SDL_CFLAGS) $< $(SDL_LDFLAGS)
.PHONY: clean
clean:
rm -f $(TARGET) $(OBJS)
You could either exchange $(CFLAGS) and $(SDL_CFLAGS) in the rule to make $(TARGET) or better remove -o from CFLAGS and put it directly before $#:
...
CFLAGS = -Wall
...
$(TARGET): $(OBJS)
g++ $(CFLAGS) $(SDL_CFLAGS) -o $# $(LDFLAGS) $(OBJS) $(SDL_LDFLAGS) $(LIBS)
-o option should immediately precede the name of the executable file to be produced. In your original Makefile it is part of $(CFLAGS) and is followed by the C flags of the SDL library. Therefore the compiler tries to link in game.exe (the $#) instead of producing an executable file by that name.
CC = g++
CFLAGS = -Wall
RM = /bin/rm -rf
BIN_DIR =
ifeq "$(DEBUG)" "1"
BIN_DIR = Debug
else
BIN_DIR = Release
endif
OBJS = \
$(BIN_DIR)/Unit.o
$(BIN_DIR)/%.o: src/%.c
#echo Building "$#"
#g++ -c "$<" -o"$#"
all: $(OBJS)
clean:
$(RM) $(BIN_DIR)
.PHONY: all clean
However, when I try to build my project this, it gives me the error:
make: *** No rule to make target 'Release/Unit.o', needed by 'all'. Stop.
I am new to writing makefiles from scratch and so this might be a stupid question, but any help is appreciated!
The problem is here:
$(BIN_DIR)/%.o: src/%.c
#echo Building "$#"
#g++ -c "#<" -o"$#"
I think that's more like this :
$(BIN_DIR)%.o: %.c
$(CC) -o $# -c $< $(CFLAGS)
As Sean Bright already pointed out, changing
#g++ -c "#<" -o"$#"
to
#g++ -c "$<" -o"$#"
also makes the Makefile work for me (ming32-make: GNU Make 3.81)
Since you had the Makefile on the same level as the source file (inside the src directory), your rule were failing.