Unable to include library in make file - c++

I have the following 3 makefiles which have been generated by some other programmer. I have included my code in between which I have marked with a begin and end. The code intends to include the libspatial index library. The other programmer has the hierarchy root directory---->tools--->r
MakeFile1 corresponds to r, MakeFile2 corresponds to tools and MakeFile3 corresponds to root
Now when I include the library I get the error that
make all
make: *** No rule to make target `bin//home/NP/rtree/spatialindex-src-1.8.0/src/storagemanager/DiskStorageManager.cc', needed by `bin/rdf3xload'. Stop.
I am unable to understand as to what mistake did I make. Can someone be kind enough to help me out.
MakeFile 1
src_tools_r:= \
tools/r/r.cpp \
tools/r/Sorter.cpp \
tools/r/StringLookup.cpp \
tools/r/TempFile.cpp \
/home/NP/rtree/spatialindex-src-1.8.0/src/storagemanager/DiskStorageManager.cc
#Code which I wrote in order to include my library --begin
# for CS machines
COURSE_DIR = /home/NP/rtree/spatialindex-src-1.8.0/.libs
LIB_DIR = /usr/local/lib
CPPFLAGS = -I. \
-I$(COURSE_DIR)
LDFLAGS = -L. \
-L$(COURSE_DIR) \
-R $(LIB_DIR):$(COURSE_DIR)
LDLIBS = -lspatialindex
#Code which I wrote in order to include my library --end
$(PREFIX)r$(EXEEXT): $(addprefix $(PREFIX),$(src_tools_r:.cpp=$(OBJEXT)) $(src_infra:.cpp=$(OBJEXT)) $(src_rts:.cpp=$(OBJEXT)) $(src_cts:.cpp=$(OBJEXT)))
$(buildexe)
MakeFile2
include tools/r/MakeFile1
src_tools:= \
$(src_tools_r) \
#Code which I wrote in order to include my library --begin
# for CS machines
COURSE_DIR = /home/NP/rtree/spatialindex-src-1.8.0/.libs
LIB_DIR = /usr/local/lib
CPPFLAGS = -I. \
-I$(COURSE_DIR)
LDFLAGS = -L. \
-L$(COURSE_DIR) \
-R $(LIB_DIR):$(COURSE_DIR)
LDLIBS = -lspatialindex
#Code which I wrote in order to include my library --end
**MakeFile3
# Include platform dependent makefiles
ifeq ($(OS),Windows_NT)
include Makefile.nt
else
include Makefile.unix
endif
PREFIX:=bin/
#############################################################################
# Default target
all: $(PREFIX)rd$(EXEEXT) $(PREFIX)r$(EXEEXT) $(PREFIX)rq$(EXEEXT) $(PREFIX)ru$(EXEEXT) $(PREFIX)re$(EXEEXT) $(PREFIX)ro$(EXEEXT)
#############################################################################
# Collect all sources
ifeq ($(LINEEDITOR),1)
src_lineeditor:=lineeditor/LineInput.cpp lineeditor/LineEditor.cpp lineeditor/Terminal.cpp lineeditor/Display.cpp lineeditor/Buffer.cpp
endif
include tools/Make2
source:=$(src_cts) $(src_infra) $(src_rts) $(src_tools) $(src_lineeditor)
#############################################################################
# Dependencies
generatedependencies=$(call nativefile,$(PREFIX)makeutil/getdep) -o$(basename $#).d $(IFLAGS) $< $(basename $#)$(OBJEXT) $(genheaders) $(GENERATED-$<)
ifneq ($(IGNORE_DEPENDENCIES),1)
-include $(addprefix $(PREFIX),$(source:.cpp=.d)) $(addsuffix .d,$(basename $(wildcard $(generatedsource))))
endif
#############################################################################
# Compiling
#Code which I wrote in order to include my library --begin
# for CS machines
COURSE_DIR = /home/NP/rtree/spatialindex-src-1.8.0/.libs
LIB_DIR = /usr/local/lib
CPPFLAGS = -I. \
-I$(COURSE_DIR)
LDFLAGS = -L. \
-L$(COURSE_DIR) \
-R $(LIB_DIR):$(COURSE_DIR)
LDLIBS = -lspatialindex
compile=$(CXX) -c $(TARGET)$(call nativefile,$#) $(CXXFLAGS) $(CXXFLAGS-$(firstword $(subst /, ,$<))) $(IFLAGS) $(IFLAGS-$(firstword $(subst /, ,$<))) $(call nativefile,$<)
$(PREFIX)%$(OBJEXT): %.cpp $(PREFIX)makeutil/getdep$(EXEEXT)
$(checkdir)
$(generatedependencies)
$(compile)
#############################################################################
# Cleanup
clean:
find bin -name '*.d' -delete -o -name '*.o' -delete -o '(' -perm -u=x '!' -type d ')' -delete
#############################################################################
# Executable
$(PREFIX)query: $(addprefix $(PREFIX),$(source:.cpp=$(OBJEXT)))
#Code which I wrote in order to include my library --end

If this is an independent library, it should have its own Makefile and should build alone as well.
If you want to integrate your source into the main build process, you must conform to their structure.
You have
different c++ source suffix .cc vs .cpp
This is easily resolvable by renaming your source files to .cpp.
absolute path /home/NP/rtree/... vs relative path tools/r/...
This would involve moving the entire tree into the main build tree, because the rules expect the directories to be accessible from there.
But I think the best is to have a library Makefile and integrate that into the main build.
Unfortunately, there is no easy answer like change variable X and move line Y. I recommend, sit down with your colleague and resolve this Makefile issue together.

Related

Makefile error when building Veins project with Omnet++

I've built a number of projects with Veins on Omnet++ without issues at this stage, and I decided to implement CAM messages into a simulation. However, upon building I arrive at the following error:
12:41:23 **** Incremental Build of configuration release for project v2x ****
make MODE=release all
cd src && make make[1]: Entering directory '/home/veins/workspace.omnetpp/v2x/src'
Creating executable: ../out/clang-release/src/v2x /usr/bin/ld: cannot open output file ../out/clang-release/src/v2x: Is a directory
clang: error: linker command failed with exit code 1 (use -v to see invocation)
make[1]:
*** [Makefile:117: ../out/clang-release/src/v2x] Error 1 make[1]: Leaving directory '/home/veins/workspace.omnetpp/v2x/src'
make: *** [Makefile:2: all]
Error 2 "make MODE=release all" terminated with exit code 2.
Build might be incomplete.
12:41:24 Build Failed. 3 errors, 0 warnings. (took 549ms)
My Makefile reads:
#
# OMNeT++/OMNEST Makefile for v2x
#
# This file was generated with the command:
# opp_makemake -f --deep -KINET_PROJ=/home/veins/src/inet -KLTE_PROJ=/home/veins/src/simulte -KVEINS_INET_PROJ=/home/veins/src/veins/subprojects/veins_inet -KVEINS_PROJ=/home/veins/src/veins -DINET_IMPORT -DVEINS_IMPORT -DVEINS_INET_IMPORT -I$$\(INET_PROJ\)/src -I$$\(LTE_PROJ\)/src -I$$\(VEINS_INET_PROJ\)/src -I$$\(VEINS_PROJ\)/src -I. -L$$\(INET_PROJ\)/src -L$$\(LTE_PROJ\)/src -L$$\(VEINS_PROJ\)/src -L$$\(VEINS_INET_PROJ\)/src -lINET$$\(D\) -llte$$\(D\) -lveins$$\(D\) -lveins_inet$$\(D\)
#
# Name of target to be created (-o option)
TARGET_DIR = .
TARGET_NAME = v2x$(D)
TARGET = $(TARGET_NAME)$(EXE_SUFFIX)
TARGET_IMPLIB = $(TARGET_NAME)$(IMPLIB_SUFFIX)
TARGET_IMPDEF = $(TARGET_NAME)$(IMPDEF_SUFFIX)
TARGET_FILES = $(TARGET_DIR)/$(TARGET)
# User interface (uncomment one) (-u option)
USERIF_LIBS = $(ALL_ENV_LIBS) # that is, $(TKENV_LIBS) $(QTENV_LIBS) $(CMDENV_LIBS)
#USERIF_LIBS = $(CMDENV_LIBS)
#USERIF_LIBS = $(TKENV_LIBS)
#USERIF_LIBS = $(QTENV_LIBS)
# C++ include paths (with -I)
INCLUDE_PATH = -I$(INET_PROJ)/src -I$(LTE_PROJ)/src -I$(VEINS_INET_PROJ)/src -I$(VEINS_PROJ)/src -I.
# Additional object and library files to link with
EXTRA_OBJS =
# Additional libraries (-L, -l options)
LIBS = $(LDFLAG_LIBPATH)$(INET_PROJ)/src $(LDFLAG_LIBPATH)$(LTE_PROJ)/src $(LDFLAG_LIBPATH)$(VEINS_PROJ)/src $(LDFLAG_LIBPATH)$(VEINS_INET_PROJ)/src -lINET$(D) -llte$(D) -lveins$(D) -lveins_inet$(D)
# Output directory
PROJECT_OUTPUT_DIR = ../out
PROJECTRELATIVE_PATH = src
O = $(PROJECT_OUTPUT_DIR)/$(CONFIGNAME)/$(PROJECTRELATIVE_PATH)
# Object files for local .cc, .msg and .sm files
OBJS = \
$O/v2x/GeneralMessageSerializer.o \
$O/v2x/VeinsInetApplicationBase.o \
$O/v2x/VeinsInetManager.o \
$O/v2x/VeinsInetManagerBase.o \
$O/v2x/VeinsInetManagerForker.o \
$O/v2x/VeinsInetMobility.o \
$O/v2x/VeinsInetSampleApplication.o \
$O/v2x/VeinsInetSampleMessageSerializer.o \
$O/v2x/GeneralMessage_m.o \
$O/v2x/VeinsInetSampleMessage_m.o
# Message files
MSGFILES = \
v2x/GeneralMessage.msg \
v2x/VeinsInetSampleMessage.msg
# SM files
SMFILES =
# Other makefile variables (-K)
INET_PROJ=/home/veins/src/inet
LTE_PROJ=/home/veins/src/simulte
VEINS_INET_PROJ=/home/veins/src/veins/subprojects/veins_inet
VEINS_PROJ=/home/veins/src/veins
#------------------------------------------------------------------------------
# Pull in OMNeT++ configuration (Makefile.inc)
ifneq ("$(OMNETPP_CONFIGFILE)","")
CONFIGFILE = $(OMNETPP_CONFIGFILE)
else
CONFIGFILE = $(shell opp_configfilepath)
endif
ifeq ("$(wildcard $(CONFIGFILE))","")
$(error Config file '$(CONFIGFILE)' does not exist -- add the OMNeT++ bin directory to the path so that opp_configfilepath can be found, or set the OMNETPP_CONFIGFILE variable to point to Makefile.inc)
endif
include $(CONFIGFILE)
# Simulation kernel and user interface libraries
OMNETPP_LIBS = $(OPPMAIN_LIB) $(USERIF_LIBS) $(KERNEL_LIBS) $(SYS_LIBS)
ifneq ($(PLATFORM),win32.x86_64)
LIBS += -Wl,-rpath,$(abspath $(INET_PROJ)/src) -Wl,-rpath,$(abspath $(LTE_PROJ)/src) -Wl,-rpath,$(abspath $(VEINS_PROJ)/src) -Wl,-rpath,$(abspath $(VEINS_INET_PROJ)/src)
endif
COPTS = $(CFLAGS) $(IMPORT_DEFINES) -DINET_IMPORT -DVEINS_IMPORT -DVEINS_INET_IMPORT $(INCLUDE_PATH) -I$(OMNETPP_INCL_DIR)
MSGCOPTS = $(INCLUDE_PATH)
SMCOPTS =
# we want to recompile everything if COPTS changes,
# so we store COPTS into $COPTS_FILE (if COPTS has changed since last build)
# and make the object files depend on it
COPTS_FILE = $O/.last-copts
ifneq ("$(COPTS)","$(shell cat $(COPTS_FILE) 2>/dev/null || echo '')")
$(shell $(MKPATH) "$O")
$(file >$(COPTS_FILE),$(COPTS))
endif
#------------------------------------------------------------------------------
# User-supplied makefile fragment(s)
-include makefrag
#------------------------------------------------------------------------------
# Main target
all: $(TARGET_FILES)
$(TARGET_DIR)/% :: $O/%
#mkdir -p $(TARGET_DIR)
$(Q)$(LN) $< $#
ifeq ($(TOOLCHAIN_NAME),clang-msabi)
-$(Q)-$(LN) $(<:%.dll=%.lib) $(#:%.dll=%.lib) 2>/dev/null
endif
$O/$(TARGET): $(OBJS) $(wildcard $(EXTRA_OBJS)) Makefile $(CONFIGFILE)
#$(MKPATH) $O
#echo Creating executable: $#
$(Q)$(CXX) $(LDFLAGS) -o $O/$(TARGET) $(OBJS) $(EXTRA_OBJS) $(AS_NEEDED_OFF) $(WHOLE_ARCHIVE_ON) $(LIBS) $(WHOLE_ARCHIVE_OFF) $(OMNETPP_LIBS)
.PHONY: all clean cleanall depend msgheaders smheaders
.SUFFIXES: .cc
$O/%.o: %.cc $(COPTS_FILE) | msgheaders smheaders
#$(MKPATH) $(dir $#)
$(qecho) "$<"
$(Q)$(CXX) -c $(CXXFLAGS) $(COPTS) -o $# $<
%_m.cc %_m.h: %.msg
$(qecho) MSGC: $<
$(Q)$(MSGC) -s _m.cc -MD -MP -MF $O/$(basename $<)_m.h.d $(MSGCOPTS) $?
%_sm.cc %_sm.h: %.sm
$(qecho) SMC: $<
$(Q)$(SMC) -c++ -suffix cc $(SMCOPTS) $?
msgheaders: $(MSGFILES:.msg=_m.h)
smheaders: $(SMFILES:.sm=_sm.h)
clean:
$(qecho) Cleaning $(TARGET)
$(Q)-rm -rf $O
$(Q)-rm -f $(TARGET_FILES)
$(Q)-rm -f $(call opp_rwildcard, . , *_m.cc *_m.h *_sm.cc *_sm.h)
cleanall:
$(Q)$(CLEANALL_COMMAND)
$(Q)-rm -rf $(PROJECT_OUTPUT_DIR)
help:
#echo "$$HELP_SYNOPSYS"
#echo "$$HELP_TARGETS"
#echo "$$HELP_VARIABLES"
#echo "$$HELP_EXAMPLES"
# include all dependencies
-include $(OBJS:%=%.d) $(MSGFILES:%.msg=$O/%_m.h.d)
It's correct in saying that clang-release/src/v2x is a directory, but it has always been so (even before making the recent changes) and it hasn't produced this error.
Other than the MakeFile error, there is no other error in any of the scripts for the project.
You want to create the executable file clang-release/src/v2x but you can't because that file already exists and is a directory.
The name of the file you attempt to create is
v2x$(D)$(EXE_SUFFIX) and nowhere in your Makefile do you have Make variables D or EXE_SUFFIX defined, so they evaluate to empty strings.
Probably you want to make sure you have D and EXE_SUFFIX defined somewhere.
There is a $(CONFIGFILE) you are including, Make finds it but you did not provide the text of it, check if these variables should be defined in there but are not.

Use make to compile all cpp files in a directory into their own executable with g++ [duplicate]

This question already has answers here:
Makefile to compile multiple C programs?
(8 answers)
Closed 28 days ago.
I want to compile all the cpp files in my current directory into their own executables with one call. None of these files share anything so they don't need to be compiled into a single program. I was thinking about using a script but then I remembered about make and makefiles (haven't used it in years). Can I write a makefile to do this?
This post answers your question. It is about C programs but you can adapt it to C++.
Makefile to compile multiple C programs?
Thanks to #Robert, I have copied his Makefile from https://stackoverflow.com/a/13696012/1860805
And made changes to work with C++. Hope it works for you
############################################################################
# 'A Generic Makefile for Building Multiple main() Targets in $PWD'
# Author: Robert A. Nader (2012)
# Ramanan.T : Modified to work with C++ (2023)
# Email: naderra at some g
# Web: xiberix
############################################################################
#
# The purpose of this makefile is to compile to executable all C source
# files in CWD, where each .c file has a main() function, and each object
# links with a common LDFLAG.
#
# This makefile should suffice for simple projects that require building
# similar executable targets. For example, if your CWD build requires
# exclusively this pattern:
#
# cc -c $(CFLAGS) main_01.cpp
# cc main_01.o $(LDFLAGS) -o main_01
#
# cc -c $(CFLAGS) main_2..cpp
# cc main_02.o $(LDFLAGS) -o main_02
#
# etc, ... a common case when compiling the programs of some chapter,
# then you may be interested in using this makefile.
#
# What YOU do:
#
# Set PRG_SUFFIX_FLAG below to either 0 or 1 to enable or disable
# the generation of a .exe suffix on executables
#
# Set CFLAGS and LDFLAGS according to your needs.
#
# What this makefile does automagically:
#
# Sets SRC to a list of *.c files in PWD using wildcard.
# Sets PRGS BINS and OBJS using pattern substitution.
# Compiles each individual .c to .o object file.
# Links each individual .o to its corresponding executable.
#
###########################################################################
#
PRG_SUFFIX_FLAG := 0
#
CFLAGS_INC :=
CFLAGS := -g -Wall $(CFLAGS_INC)
CXXFLAGS = -m64 -O0 -g3 -Wall -DUNIX=1 -DMETA=1
LDFLAGS = -g3 -O0 -m64
#
## ==================- NOTHING TO CHANGE BELOW THIS LINE ===================
##
SRCS := $(wildcard *.cpp)
PRGS := $(patsubst %.cpp,%,$(SRCS))
PRG_SUFFIX=.exe
BINS := $(patsubst %,%$(PRG_SUFFIX),$(PRGS))
## OBJS are automagically compiled by make.
OBJS := $(patsubst %,%.o,$(PRGS))
##
all : $(BINS)
##
## For clarity sake we make use of:
.SECONDEXPANSION:
OBJ = $(patsubst %$(PRG_SUFFIX),%.o,$#)
ifeq ($(PRG_SUFFIX_FLAG),0)
BIN = $(patsubst %$(PRG_SUFFIX),%,$#)
else
BIN = $#
endif
## Compile the executables
%$(PRG_SUFFIX) : $(OBJS)
$(CXX) $(OBJ) $(CXXFLAGS) $(LDFLAGS) -o $(BIN)
##
## $(OBJS) should be automagically removed right after linking.
##
clean:
ifeq ($(PRG_SUFFIX_FLAG),0)
$(RM) $(PRGS) $(OBJS)
else
$(RM) $(BINS) $(OBJS)
endif
##
rebuild: clean all
##
## eof Generic_Multi_Main_PWD.makefile

c++ makefile using gcc - generate source file list from a list of subfolders

So I have some rules that work:
# Folders
SRCDIR = src
SUBFOLDERS = test test/test2
OBJDIR = obj
# Just for me so I can read my own makefile :o
_TARGET = $#
_DEPEND = $<
# Get sources from /src and /src/test/ and /src/test/test2/
SOURCES = $(wildcard $(SRCDIR)/*.cpp ))
SOURCES = $(wildcard $(SRCDIR)/test/*.cpp ))
SOURCES = $(wildcard $(SRCDIR)/test/test2/*.cpp ))
OBJECTS = $(addprefix $(OBJDIR)/, $(patsubst src/%, %, $(SOURCES:.cpp=.o))
# Main target 'make debug'
debug: debugging $(OBJECTS)
#echo building: gcc $(OBJECTS) -o out.exe
# Compiling each file
$(OBJDIR)/%.o: $(SRCDIR)/%.cpp
g++ -c $(_DEPEND) -o $(_TARGET)
debugging:
#echo $(SOURCES)
#echo $(OBJECTS)
Note: I had to hand-copy this code so there may be some errors, but hopefully its clear what I am trying to do.
Lets say I want to add some more source file sub folders: src/another, src/andanother. Now I have to add more SOURCES = ... lines to do this. Is there a way to do this in a rule. I have been tinkering with it but I can't come up with rules that work yet. What I want is that I add a new folder to SUBFOLDERS list and my code picks up the .cpp files automatically.
note I don't want to use things like $(shell find ... ) because windows find sucks and I want this to be as portable as possiblt windows/Linux.
You can use make's foreach.
like:
SOURCES = $(foreach dir,${SUBFOLDERS},$(wildcard ${dir}/*.cpp))
more info:
https://www.gnu.org/software/make/manual/html_node/Foreach-Function.html

Makefile to build C and CPP files

I have been looking for a Makefile to compile a huge project which contains lots of C and C++ files. I have used Eclipse to compile it successfully but I want to go to a standalone Makefile.
I found this generic Makefile that works really well with my project except it can only compile C or C++ files but not both in one run...so it fails at Linking time.
The bits of original Makefile that compile for CPP or C:
SRC_EXT = cpp
OURCES = $(shell find $(SRC_PATH)/ -name '*.$(SRC_EXT)' -printf '%T#\t%p\n' \
SOURCES = $(shell find $(SRC_PATH)/ -name '*.$(CPP_EXT)' -o -name '*.$(C_EXT)' -printf '%T#\t%p\n' \
| sort -k 1nr | cut -f2-)
# fallback in case the above fails
rwildcard = $(foreach d, $(wildcard $1*), $(call rwildcard,$d/,$2) \
$(filter $(subst *,%,$2), $d))
ifeq ($(SOURCES),)
SOURCES := $(call rwildcard, $(SRC_PATH)/, *.$(SRC_EXT))
endif
OBJECTS = $(SOURCES:$(SRC_PATH)/%.$(SRC_EXT)=$(BUILD_PATH)/%.o)
DEPS = $(OBJECTS:.o=.d)
I tried to modify it to be:
SRC_EXT = cpp c
SOURCES = $(shell find $(SRC_PATH)/ -name '*.$(CPP_EXT)' -o -name '*.$(C_EXT)' -printf '%T#\t%p\n' \
| sort -k 1nr | cut -f2-)
# fallback in case the above fails
rwildcard = $(foreach d, $(wildcard $1*), $(call rwildcard,$d/,$2) \
$(filter $(subst *,%,$2), $d))
ifeq ($(SOURCES),)
SOURCES := $(call rwildcard, $(SRC_PATH)/, *.$(SRC_EXT))
endif
But i'm not sure what to do with the OBJECTS directive to make it work with the multiple extensions:
OBJECTS = $(SOURCES:$(SRC_PATH)/%.$(SRC_EXT)=$(BUILD_PATH)/%.o)
Can anybody help with this please?
Thanks
First, replace .cpp by .o, then replace the remaining .c by .o.

Error generating dependencies with make

I am trying to implement the non-recursive make solution outlined in the paper "Recursive Make Considered Harmful". I'm currently stuck on getting the *.d dependency files to generate. I've provided the makefile, sample module.mk and error below. Any ideas how I can fix this?
MODULES := \
module1 \
module2
# define compiler
CC = /opt/local/bin/clang++-mp-3.1
# exclude the following warnings for clang
CLANG_NO_WARN = \
-Wno-c++98-compat \
-Wno-weak-vtables \
-Wno-padded \
-Wno-global-constructors \
-Wno-exit-time-destructors
# look for include files in each of the modules
CFLAGS += \
-g -Weverything -Wall -std=c++11 -stdlib=libc++ $(CLANG_NO_WARN) \
-I../ -I/usr/local/include $(patsubst %, -I%, $(MODULES))
# linker flags
LDFLAGS := \
-stdlib=libc++ \
-L/usr/local/boost_1_50_0/stage/lib -L/usr/local/lib
# extra libraries if required (each module will add to this)
LIBS := \
-lboost_program_options \
-lboost_system \
-lglog \
-lpugixml
# source files to be compiled (each module will add to this)
SRCS := \
Main.cpp
# include the descriptions for each module
include $(patsubst %, %/module.mk, $(MODULES))
# determine the object files
OBJS := \
$(patsubst %.cpp, %.o, $(filter %.cpp, $(SRCS)))
# link the program
prog: $(OBJS)
$(CC) -o $# $(OBJS) $(LDFLAGS) $(LIBS)
# include the C include dependencies
include $(OBJS:.o=.d)
# calculate C include dependencies
%.d: %.cpp
depend.sh `dirname $*.cpp` $(CFLAGS) $*.cpp > $#
----------
#!/bin/sh
# Evaluate dependencies for use by the makefile
echo "Called"
DIR="$1"
shift 1
case "$DIR" in
"" | ".")
$CC -MM -MG "$#" | sed -e 's#ˆ\(.*\)\.o:#\1.d \1.o:#' ;;
*)
$CC -MM -MG "$#" | sed -e "s#ˆ\(.*\)\.o:#$DIR/\1.d \ $DIR/\1.o:#" ;;
esac
------------
# module.mk
SRCS += \
Algo.cpp \
CommandHandler.cpp \
Exchange.cpp \
TCPSocket.cpp \
TradingEngine.cpp
----------
$ make
makefile:68: Main.d: No such file or directory
makefile:68: view_string.d: No such file or directory
makefile:68: Algo.d: No such file or directory
makefile:68: CommandHandler.d: No such file or directory
makefile:68: Exchange.d: No such file or directory
makefile:68: TCPSocket.d: No such file or directory
makefile:68: TradingEngine.d: No such file or directory
makefile:68: Exchange.d: No such file or directory
makefile:68: Requests.d: No such file or directory
makefile:68: TickCapture.d: No such file or directory
makefile:68: types.d: No such file or directory
make: *** No rule to make target `types.d'. Stop.
UPDATE
Finished makefile and sample module.mk
$cat makefile
# executable name
BINARY := my_prog
# clang config
CLANG := /opt/local/bin/clang++-mp-3.1
CLANG_WARNINGS := \
-Wno-c++98-compat \
-Wno-weak-vtables \
-Wno-padded \
-Wno-global-constructors \
-Wno-exit-time-destructors
CLANG_CFLAGS := \
-g -Weverything -Wall -std=c++11 -stdlib=libc++
CLANG_LDFLAGS := \
-stdlib=libc++
# generic compiler config
CC := $(CLANG)
CFLAGS := $(CLANG_WARNINGS) $(CLANG_CFLAGS)
LDFLAGS := $(CLANG_LDFLAGS)
INCS := \
-I../ \
-I/usr/local/include \
$(patsubst %, -I%, $(SUBDIRS))
LIBS := \
-L/usr/local/boost_1_50_0/stage/lib \
-L/usr/local/lib \
-lboost_program_options \
-lboost_system \
-lglog \
-lpugixml
# list subdirectories in which to look for dependencies
# must define SRCS first as subdirs will append to this
# their src files
SRCS := Main.cpp
SUBDIRS := \
module1 \
module2
include $(patsubst %, %/module.mk, $(SUBDIRS))
# derive object files from srcs
OBJS := $(patsubst %.cpp, %.o, $(filter %.cpp, $(SRCS)))
# link the program
$(BINARY): $(OBJS)
$(CC) -o $# $(OBJS) $(LDFLAGS) $(LIBS)
# include generated dependency files
DEPS := $(OBJS:.o=.d)
-include $(DEPS)
# generate include dependencies
%.d: %.cpp
./depend.sh `dirname $*.cpp` $(INCS) $*.cpp > $#
# compile
.cpp.o:
$(CC) $(CFLAGS) $(INCS) $< -c -o $#
# clean, obviously
clean:
rm -f $(BINARY)
rm -f $(OBJS)
rm -f $(DEPS)
# et voila!
-----
$cat module1/module.mk
SRCS_PATH := module1
SRCS += \
$(SRCS_PATH)/Algo.cpp \
$(SRCS_PATH)/CommandHandler.cpp \
$(SRCS_PATH)/Exchange.cpp \
$(SRCS_PATH)/TCPSocket.cpp \
$(SRCS_PATH)/TradingEngine.cpp
It looks as if some module adds types.cpp to SRCS, even though no such source file exists.
As for the warnings, the first time you run this makefile, the dependency files (foo.d) do not yet exist, so Make complains that it can't include them. It's not a problem, and the warnings won't appear in subsequent runs when those files do exist beforehand. To supress the warnings entirely, change include to -include.