undefined reference to `main' with makefile on linux, with boost and mpi - c++
I am not very familiar with make; i've always used and modified this highly ancient makefile I inherited from another project, modifying it as necessary. Up until now, it has functioned perfectly, compiling together projects with 20-50 files, even within sub-directories, determining and building all the dependencies properly.
Today I am running a very simple test code to determine if BOOST.MPI will work on a cluster I recently got access to. I am trying to compile a 1-file test case to make sure that the library works. This is also my first time building and linking to boost on this system.
I have boost installed in my user directory: ~/boost, and I've run the appropriate bjam to ensure that BOOST.MPI is present. I don't believe my problem lies there. As you'll see in a moment, however, I had to include -lboost_mpi and -lboost_serialization to get as far as I did.
The makefile seems to compile, and assemble just fine producing the intermediary .a file. It hangs up on the linking step with a surprising error:
Creating dependency for "boosttest.cpp"
Compiling "boosttest.cpp"
Assembling ag...
ar: creating ./libag.a
Linking bt1...
/usr/lib/gcc/x86_64-redhat-linux/4.4.5/../../../../lib64/crt1.o: In function `_start':
(.text+0x20): undefined reference to `main'
collect2: ld returned 1 exit status
make: *** [bt1] Error 1
The only source code I've written (copy/pasted right out of the Boost.MPI implementation page):
boosttest.cpp:
#include <boost/mpi/environment.hpp>
#include <boost/mpi/communicator.hpp>
#include <iostream>
int main(int argc, char* argv[])
{
boost::mpi::environment env(argc, argv);
boost::mpi::communicator world;
std::cout << "I am process " << world.rank() << " of " << world.size()<< "." << std::endl;
return 0;
}
Now for the part where I get lost. This is the makefile I've modified. I mostly understand what parts of it are doing, and it is the only makefile I've ever seen (although as mentioned I'm not very experienced with them) to produce .d files containing a list of all dependent libraries.
Makefile:
PROJECT = boosttest
# The names of the sub-projects that the executable depends on. These names are used later on to define targets, location, libraries, etc.
DEPS =
# The names of the sub-projects that the test executable depends on.
TEST_DEPS =
EXE_DEPS =
LOCAL_O_FILES = boosttest.o
LOCAL_TEST_O_FILES =
LOCAL_LIB_NAME = ag
LOCAL_LIB_DIR = .
LOCAL_TEST_LIB_NAME =
LOCAL_TEST_LIB_DIR =
LOCAL_INCLUDE_ROOT = .
EXE_NAME = BT
MPIC_DIR = /usr/local/mvapich2-1.6-gcc/
#these assume our local path and bin are set up properly since I don't know where the compilers are
CC = $(MPIC_DIR)/bin/mpicc
CCC = $(MPIC_DIR)/bin/mpicxx
F77 = $(MPIC_DIR)/bin/mpif77
CLINKER = $(MPIC_DIR)/bin/mpicc
CCLINKER = $(MPIC_DIR)/bin/mpicxx
FLINKER = $(MPIC_DIR)/bin/mpif90
F90 = $(MPIC_DIR)/bin/mpif90
F90LINKER = $(MPIC_DIR)/bin/mpif90
MAKE = make --no-print-directory
SHELL = /bin/sh
#PROF = -ggdb -O2
PROF = -O2
ADDITIONAL_LIBS = -lboost_mpi -lboost_serialization
SED = $(shell which sed)
GREP = $(shell which grep)
# Warnings will depend on the GCC version -- if it's 4, have "-Wdeclaration-after-statement -Wunused-value -Wunused-variable"
#GCC_MAJOR_VERSION = $(shell $(CCC) --version | $(GREP) "\(egcs\|gcc\)" | $(SED) "s/[^0-9]*\([0-9]\).*/\1/")
#WARNINGS = -Wno-import $(shell if test $(GCC_MAJOR_VERSION) -eq 4; then echo -Wunused-value -Wunused-variable; fi)
#GCC_INSTALL_DIR = /turing/software-linux/mpich-eth
GCC_INSTALL_DIR = $(MPIC_DIR)
GCC_INCLUDE_DIR = $(GCC_INSTALL_DIR)/include/
GCC_LIB_DIR = $(GCC_INSTALL_DIR)/lib/
BOOST_DIR = ~/boost
BOOST_LIB_DIR = ~/boost/stage/lib
# Expand SRCDIR so that it turns into "-I <srcdir>" for each listed directory
INCLUDE_DIRS = -I $(OBJC_ROOT)/include $(foreach dep, $(UNIQUE_DEPS), -I$($(dep)_INCLUDE_ROOT)) -I $(LOCAL_INCLUDE_ROOT) -I $(BOOST_DIR) -I $(GCC_INCLUDE_DIR)
#C_FLAGS = -DROM $(PROF) $(WARNINGS) $(INCLUDE_DIRS)
C_FLAGS = -DROM $(PROF) $(INCLUDE_DIRS)
L_FLAGS = $(foreach dir, $(OBJC_ROOT) $(DEP_LIB_DIRS), -L$(dir)) -L $(BOOST_LIB_DIR) -L $(GCC_LIB_DIR) $(PROF) $(ADDITIONAL_LIBS)
TEST_L_FLAGS = $(foreach dir, $(OBJC_ROOT) $(TEST_DEP_LIB_DIRS), -L$(dir)) -L/usr/lib -Xlinker --whole-archive $(TEST_REQUIRED_LIBS) -Xlinker --no-whole-archive
REQUIRED_LIBS = $(foreach dep, $(DEPS) LOCAL, $(if $($(dep)_LIB_NAME), -l$($(dep)_LIB_NAME)))
TEST_REQUIRED_LIBS = $(foreach dep, $(TEST_DEPS) LOCAL LOCAL_TEST, $(if $($(dep)_LIB_NAME), -l$($(dep)_LIB_NAME)))
.SUFFIXES:
.SUFFIXES: .d .cc .cpp .c .o
ASSEMBLE_TARGETS = $(foreach dep,$(DEPS),$(dep)_LIB_NAME)
ASSEMBLE_TEST_TARGETS = $(foreach dep,$(TEST_DEPS),$(dep)_LIB_NAME)
CLEAN_TARGETS = $(foreach dep, $(UNIQUE_DEPS), $(dep)_CLEAN)
LOCAL_D_FILES = $(LOCAL_O_FILES:.o=.d)
LOCAL_TEST_D_FILES = $(LOCAL_TEST_O_FILES:.o=.d) $(TEST_RUNNER:.o=.d)
DEP_LIB_DIRS = $(foreach dep, $(DEPS) LOCAL, $($(dep)_LIB_DIR))
TEST_DEP_LIB_DIRS = $(foreach dep, $(TEST_DEPS) LOCAL LOCAL_TEST, $($(dep)_LIB_DIR))
UNIQUE_ASSEMBLE_TARGETS = $(sort $(ASSEMBLE_TARGETS) $(ASSEMBLE_TEST_TARGETS))
UNIQUE_DEPS = $(sort $(DEPS) $(TEST_DEPS))
LOCAL_LIB = $(if $(LOCAL_LIB_NAME), $(LOCAL_LIB_DIR)/lib$(LOCAL_LIB_NAME).a)
LOCAL_TEST_LIB = $(if $(LOCAL_TEST_LIB_NAME), $(LOCAL_TEST_LIB_DIR)/lib$(LOCAL_TEST_LIB_NAME).a)
EXE_TARGETS = $(foreach dep,$(EXE_DEPS),$(dep)_EXE_NAME)
INSTALL_TARGETS = $(foreach dep,$(EXE_DEPS),$(dep)_INSTALL)
export PROJECTS += $(PROJECT)
# PHONY targets get remade even if there exists an up-to-date file with the same name.
.PHONY: default clean compile assemble link submit
# Targets for mortals
default: link
clean: $(CLEAN_TARGETS) LOCAL_CLEAN
compile: $(DEPS) $(LOCAL_D_FILES) $(LOCAL_O_FILES)
assemble: compile $(ASSEMBLE_TARGETS) $(LOCAL_LIB)
link: assemble $(EXE_TARGETS) $(EXE_NAME)
install: $(INSTALL_TARGETS) $(if $(EXE_NAME), LOCAL_INSTALL)
submit: link
qsub $(PROJECT).qsub
# Targets for make
# Invoking sub projects
$(UNIQUE_DEPS): MAKE_TARGET = $(if $(filter %_TEST, $#), compile-tests, compile)
$(UNIQUE_DEPS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($#_DIR) && $(MAKE) $(MAKE_TARGET))
# First, remove the _LIB_NAME attached by ASSEMBLE_TARGETS, a
$(UNIQUE_ASSEMBLE_TARGETS): DEP_NAME = $(#:_LIB_NAME=)
$(UNIQUE_ASSEMBLE_TARGETS): MAKE_TARGET = $(if $(filter %_TEST, $(DEP_NAME)), assemble-tests, assemble)
$(UNIQUE_ASSEMBLE_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) $(MAKE_TARGET))
# First, remove the _EXE_NAME attached by EXE_TARGETS, a
$(EXE_TARGETS): DEP_NAME = $(#:_EXE_NAME=)
$(EXE_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) link)
$(CLEAN_TARGETS): DEP_NAME = $(#:_CLEAN=)
$(CLEAN_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) clean)
$(INSTALL_TARGETS): DEP_NAME = $(#:_INSTALL=)
$(INSTALL_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) install)
#Local stuff
# The rule to change either a '.c' or a '.m' to a '.o'
#%.o : %.c %.d %.cc %.cpp
.cc.o .cpp.o .c.o:
#echo "Compiling \"$<\""
#$(CCC) -c $(C_FLAGS) $< -o $#
.cc.d .cpp.d .c.d :
#echo "Creating dependency for \"$<\""
# #$(CCC) $(WARNINGS) $(INCLUDE_DIRS) -MM $< -o $#
# This foogly hack because gcc seems to have issues with emitting the correct target/dependency names of
# files in sub-dirs of the current dir (specifically, it doesn't add the sub-dir to the target
# name, and insists on adding the directory to the dependencies) which ends up breaking dependencies...)
#dependLine=$$( $(CCC) $(C_FLAGS) $(INCLUDE_DIRS) -MM $< ); \
dirName=$$( dirname $< | $(SED) "s/\//\\\\\//g" ); \
dependLine=$$( echo $${dependLine} | $(SED) "s/ $${dirName}\// /g" ); \
oFile=$$( echo $${dependLine} | $(SED) "s/:.*//" ); \
dependencies=$$( echo $${dependLine} | $(SED) "s/.*://" ); \
echo $${oFile} $${oFile%.o}.d: $${dependencies} | $(SED) "s/ \\\//g" > $#
$(UNIQUE_ASSEMBLE_TARGETS): DEP_NAME = $(#:_LIB_NAME=)
$(UNIQUE_ASSEMBLE_TARGETS): MAKE_TARGET = $(if $(filter %_TEST, $(DEP_NAME)), assemble-tests, assemble)
$(UNIQUE_ASSEMBLE_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) $(MAKE_TARGET))
# First, remove the _EXE_NAME attached by EXE_TARGETS, a
$(EXE_TARGETS): DEP_NAME = $(#:_EXE_NAME=)
$(EXE_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) link)
$(CLEAN_TARGETS): DEP_NAME = $(#:_CLEAN=)
$(CLEAN_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) clean)
$(INSTALL_TARGETS): DEP_NAME = $(#:_INSTALL=)
$(INSTALL_TARGETS):
$(if $(findstring $(DEP_NAME), $(PROJECTS)),,cd $($(DEP_NAME)_DIR) && $(MAKE) install)
#Local stuff
# The rule to change either a '.c' or a '.m' to a '.o'
#%.o : %.c %.d %.cc %.cpp
.cc.o .cpp.o .c.o:
#echo "Compiling \"$<\""
#$(CCC) -c $(C_FLAGS) $< -o $#
.cc.d .cpp.d .c.d :
#echo "Creating dependency for \"$<\""
# #$(CCC) $(WARNINGS) $(INCLUDE_DIRS) -MM $< -o $#
# This foogly hack because gcc seems to have issues with emitting the correct target/dependency names of
# files in sub-dirs of the current dir (specifically, it doesn't add the sub-dir to the target
# name, and insists on adding the directory to the dependencies) which ends up breaking dependencies...)
#dependLine=$$( $(CCC) $(C_FLAGS) $(INCLUDE_DIRS) -MM $< ); \
dirName=$$( dirname $< | $(SED) "s/\//\\\\\//g" ); \
dependLine=$$( echo $${dependLine} | $(SED) "s/ $${dirName}\// /g" ); \
oFile=$$( echo $${dependLine} | $(SED) "s/:.*//" ); \
dependencies=$$( echo $${dependLine} | $(SED) "s/.*://" ); \
echo $${oFile} $${oFile%.o}.d: $${dependencies} | $(SED) "s/ \\\//g" > $#
$(LOCAL_LIB): compile $(ASSEMBLE_TARGETS)
#echo Assembling $(LOCAL_LIB_NAME)...
#ar rs $(LOCAL_LIB) $(LOCAL_O_FILES)
# Create the executable
$(EXE_NAME): assemble
#echo Linking $(EXE_NAME)...
#$(CCC) -o $(EXE_NAME) $(L_FLAGS)
# Erase all object files, the dependencies file, the core file and the executable, then rebuild everything
LOCAL_CLEAN:
#echo Cleaning $(PROJECT)...
#rm -f $(LOCAL_O_FILES) $(LOCAL_TEST_O_FILES) $(LOCAL_LIB) $(LOCAL_TEST_LIB) $(EXE_NAME) $(TEST_EXE_NAME) $(LOCAL_D_FILES) $(LOCAL_TEST_D_FILES) $(TEST_RUNNER) $(TEST_RUNNER:.o=.d) core*
ifeq (,$(findstring clean,$(MAKECMDGOALS)))
-include $(LOCAL_O_FILES:.o=.d) $(LOCAL_TEST_O_FILES:.o=.d)
endif
The paths to my mpicxx compiler (needed for the cluster, and for those unfamiliar, it wraps gcc) are correct, as evidenced by the fact that it does compile, it just won't link. Similarly, my boost library paths seem functional, the -lboost_mpi flag gets caught properly.
At this point, my question has extended to be for my own education based on how this makefile works/intends to work. Ultimately the entirely obvious/simple command:
mpicxx boosttest.cpp -L ~/boost/stage/lib/ -lboost_mpi -lboost_serialization -o test
however I want to get a proper makefile going as once I get past this test case verifying Boost.MPI's equivalent of a hello world, I'll be moving on to projects involving my full source code, 20+ files with cross dependencies, etc. Any help or intuition would be greatly appreciated.
Based on the suggestion of #Oktalist above, I was able to find something that works, at least for the single-file case, but I can't see why it won't work when I extend this to multiple files. I'm still at a loss why this worked in the past but not now, but perhaps I changed something I wasn't tracking.
The correction is near the end, in this block:
# Create the executable
$(EXE_NAME): assemble
#echo Linking $(EXE_NAME)...
#$(CCC) $(L_FLAGS) $(LOCAL_LIB) -o $(EXE_NAME)
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My makefile is composed like this (I know there's a lot, and I haven't created this myself - found it in a tutorial, so I don't know what's relevant and what's not :-) ): PROJECT_NAME := my_project export OUTPUT_FILENAME #MAKEFILE_NAME := $(CURDIR)/$(word $(words $(MAKEFILE_LIST)),$(MAKEFILE_LIST)) MAKEFILE_NAME := $(MAKEFILE_LIST) MAKEFILE_DIR := $(dir $(MAKEFILE_NAME) ) TEMPLATE_PATH = nrf51_sdk/toolchain/gcc ifeq ($(OS),Windows_NT) include $(TEMPLATE_PATH)/Makefile.windows else include $(TEMPLATE_PATH)/Makefile.posix endif MK := mkdir RM := rm -rf #echo suspend ifeq ("$(VERBOSE)","1") NO_ECHO := else NO_ECHO := # endif # Toolchain commands CC := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-gcc" AS := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-as" AR := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ar" -r LD := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ld" NM := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-nm" OBJDUMP := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objdump" OBJCOPY := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objcopy" SIZE := "$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-size" #function for removing duplicates in a list remduplicates = $(strip $(if $1,$(firstword $1) $(call remduplicates,$(filter-out $(firstword $1),$1)))) #source common to all targets C_SOURCE_FILES += \ main.c \ file1.c \ file2.c \ file3.c \ file4.c \ #assembly files common to all targets ASM_SOURCE_FILES = nrf51_sdk/toolchain/gcc/gcc_startup_nrf51.s #includes common to all targets INC_PATHS = -I Dir1/ INC_PATHS = -I Dir2 INC_PATHS += -I Dir3 INC_PATHS += -I Dir4 OBJECT_DIRECTORY = _build LISTING_DIRECTORY =$(OBJECT_DIRECTORY) OUTPUT_BINARY_DIRECTORY =$(OBJECT_DIRECTORY) # Sorting removes duplicates BUILD_DIRECTORIES := $(sort $(OBJECT_DIRECTORY) $(OUTPUT_BINARY_DIRECTORY) $(LISTING_DIRECTORY) ) #flags common to all targets CFLAGS = -DSOFTDEVICE_PRESENT CFLAGS += -DNRF51 CFLAGS += -DS110 CFLAGS += -DBOARD_PCA10028 CFLAGS += -DBLE_STACK_SUPPORT_REQD CFLAGS += -mcpu=cortex-m0 CFLAGS += -mthumb -mabi=aapcs --std=gnu99 CFLAGS += -Wall -O0 -g3 CFLAGS += -mfloat-abi=soft # keep every function in separate section. This will allow linker to dump unused functions CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing #CFLAGS += -flto -fno-builtin # keep every function in separate section. This will allow linker to dump unused functions LDFLAGS += -Xlinker -Map=$(LISTING_DIRECTORY)/$(OUTPUT_FILENAME).map LDFLAGS += -mthumb -mabi=aapcs -L $(TEMPLATE_PATH) -T$(LINKER_SCRIPT) LDFLAGS += -mcpu=cortex-m0 # let linker to dump unused sections LDFLAGS += -Wl,--gc-sections # use newlib in nano version LDFLAGS += --specs=nano.specs -lc -lnosys # Assembler flags ASMFLAGS += -x assembler-with-cpp ASMFLAGS += -DSOFTDEVICE_PRESENT ASMFLAGS += -DNRF51 ASMFLAGS += -DS110 ASMFLAGS += -DBOARD_PCA10028 ASMFLAGS += -DBLE_STACK_SUPPORT_REQD #default target - first one defined default: clean nrf51422_xxac_s110 #building all targets all: clean $(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e cleanobj $(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e nrf51422_xxac_s110 #target for printing all targets help: #echo following targets are available: #echo nrf51422_xxac_s110 #echo flash_softdevice C_SOURCE_FILE_NAMES = $(notdir $(C_SOURCE_FILES)) C_PATHS = $(call remduplicates, $(dir $(C_SOURCE_FILES) ) ) C_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(C_SOURCE_FILE_NAMES:.c=.o) ) ASM_SOURCE_FILE_NAMES = $(notdir $(ASM_SOURCE_FILES)) ASM_PATHS = $(call remduplicates, $(dir $(ASM_SOURCE_FILES) )) ASM_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(ASM_SOURCE_FILE_NAMES:.s=.o) ) vpath %.c $(C_PATHS) vpath %.s $(ASM_PATHS) OBJECTS = $(C_OBJECTS) $(ASM_OBJECTS) nrf51422_xxac_s110: OUTPUT_FILENAME := nrf51422_xxac_s110 nrf51422_xxac_s110: LINKER_SCRIPT=ble_app_hrs_gcc_nrf51.ld nrf51422_xxac_s110: $(BUILD_DIRECTORIES) $(OBJECTS) #echo Linking target: $(OUTPUT_FILENAME).out $(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e finalize ## Create build directories $(BUILD_DIRECTORIES): echo $(MAKEFILE_NAME) $(MK) $# # Create objects from C SRC files $(OBJECT_DIRECTORY)/%.o: %.c #echo Compiling file: $(notdir $<) #echo arm-none-eabi-gcc $(CFLAGS) $(INC_PATHS) -c -o $# $< $(NO_ECHO)$(CC) $(CFLAGS) $(INC_PATHS) -c -o $# $< # Assemble files $(OBJECT_DIRECTORY)/%.o: %.s #echo Compiling file: $(notdir $<) $(NO_ECHO)$(CC) $(ASMFLAGS) $(INC_PATHS) -c -o $# $< # Link $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out: $(BUILD_DIRECTORIES) $(OBJECTS) #echo Linking target: $(OUTPUT_FILENAME).out $(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out ## Create binary .bin file from the .out file $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin: $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out #echo Preparing: $(OUTPUT_FILENAME).bin $(NO_ECHO)$(OBJCOPY) -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin ## Create binary .hex file from the .out file $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex: $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out #echo Preparing: $(OUTPUT_FILENAME).hex $(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex finalize: genbin genhex echosize genbin: #echo Preparing: $(OUTPUT_FILENAME).bin $(NO_ECHO)$(OBJCOPY) -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin ## Create binary .hex file from the .out file genhex: #echo Preparing: $(OUTPUT_FILENAME).hex $(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex echosize: -#echo "" $(NO_ECHO)$(SIZE) $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out -#echo "" clean: $(RM) $(BUILD_DIRECTORIES) cleanobj: $(RM) $(BUILD_DIRECTORIES)/*.o flash: $(MAKECMDGOALS) #echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$<.hex nrfjprog --reset --program $(OUTPUT_BINARY_DIRECTORY)/$<.hex) ## Flash softdevice flash_softdevice: #echo Flashing: s110_softdevice.hex nrfjprog --reset --program nrf51_sdk/softdevice/s110/hex/s110_softdevice.hex
all: clean check this line. The default (first) Target of your Makefile depends on clean, so before any build is started, the clean target is executed that likely will remove all built files, to rebuild them. Drop the clean and you should get the incremental behaviour make was designed for.
CMake compile-time defines
I am new to using CMake and am attempting to transfer our previous Makefiles into CMakeLists. I have one file, *dsplink_defines.txt* that has the following compile-time defines. *-DOS_LINUX -DMAX_DSPS=1 -DMAX_PROCESSORS=2 -DID_GPP=1 -DOMAPL1XX -DPROC_COMPONENT -DPOOL_COMPONENT -DNOTIFY_COMPONENT -DMPCS_COMPONENT -DRINGIO_COMPONENT -DMPLIST_COMPONENT -DMSGQ_COMPONENT -DMSGQ_ZCPY_LINK -DCHNL_COMPONENT -DCHNL_ZCPY_LINK -DZCPY_LINK -DKFILE_DEFAULT -DDA8XXGEM -DDA8XXGEM_PHYINTERFACE=SHMEM_INTERFACE -DGPP_SWI_MODE -D_REENTRANT -DVERIFY_DATA -DDDSP_DEBUG* Our previous Makefile took care of this in the following manner and took care of this by using shell cat starting on line 8: BIN = ../../build/bin TMP = build BUILD_DEF = -DBUILD=$(BUILD_VERSION) -DBUILD_DATE=$(BUILD_DATE) # these files are captured from the DSPLink Sample build directory (and the named changed) # they contain the appropriate includes and flags to build a dsplink application. DSPLINK_INCLUDES = $(shell cat ../dsplink_config/dsplink_includes.txt) DSPLINK_FLAGS = $(shell cat ../dsplink_config/dsplink_flags.txt) DSPLINK_DEFINES = $(shell cat ../dsplink_config/dsplink_defines.txt) DSPLINK_LIBS = $(DSPLINK_PACKAGE_DIR)/dsplink/gpp/export/BIN/Linux/OMAPL1XX/RELEASE/dsplink.lib #Our project variables INCLUDE = -I../framework -I../io_master -I../logging -I../../dsp/include - I../flagDictionary #TOOLCHAIN = ${FACTORY_DIR}/build_armv5l-timesys-linux-uclibcgnueabi/toolchain/bin TOOLCHAIN = /OMAP-L137/timesys/SDK/omapl137_evm/toolchain/bin PLATFORM=armv5l-timesys-linux-uclibcgnueabi #Compile Options CC=$(TOOLCHAIN)/$(PLATFORM)-g++ LINKER=$(TOOLCHAIN)/$(PLATFORM)-g++ CFLAGS+= $(BUILD_DEF) $(INCLUDE) $(DSPLINK_DEFINES) $(DSPLINK_FLAGS) $(DSPLINK_INCLUDES) DEBUG = -O #list of things to compile. FW_BUILD_DIR=../framework/build LOG_BUILD_DIR=../logging/build FLAG_DICT_BUILD_DIR=../flagDictionary/build FRAMEWORK_OBJECTS= $(FW_BUILD_DIR)/com.o \ $(FW_BUILD_DIR)/application.o \ $(FW_BUILD_DIR)/memoryManagerBase.o \ $(FW_BUILD_DIR)/memoryManager.o \ $(FW_BUILD_DIR)/arguments.o \ $(FW_BUILD_DIR)/lockManager.o \ $(FW_BUILD_DIR)/controlCom.o \ $(FW_BUILD_DIR)/paths.o \ $(LOG_BUILD_DIR)/subsystemLogMasks.o \ $(LOG_BUILD_DIR)/logger.o FLAG_DICT_OBJECTS= $(FLAG_DICT_BUILD_DIR)/flagEntry.o \ $(FLAG_DICT_BUILD_DIR)/flagDictionary.o OBJECTS = spidev_test.o sysMon.o EXES = sysMon all: $(OBJECTS) $(EXES) .c.o: mkdir -p build $(CC) -c $(CFLAGS) $(DEBUG) -o $(TMP)/$# $< .cpp.o: mkdir -p build $(CC) -c $(CFLAGS) $(DEBUG) -o $(TMP)/$# $< spidev_test: $(FRAMEWORK_OBJECTS) spidev_test.o $(LINKER) -lpthread -lc -o $(BIN)/$# $(DSPLINK_LIBS) build/spidev_test.o $(FRAMEWORK_OBJECTS) sysMon: $(FRAMEWORK_OBJECTS) sysMon.o $(LINKER) -lpthread -lc -o $(BIN)/$# $(DSPLINK_LIBS) build/sysMon.o $(FLAG_DICT_OBJECTS) $(FRAMEWORK_OBJECTS) deploy: ../../build/deploy How do I pass these in using a CMakeList
This should work: file(READ path/to/dsplink_defines.txt defines) #read file into variable 'defines' string(REPLACE " " ";" defines "${defines}") #turn space separation into CMake list add_definitions(${defines}) Of course, if you have full control of the file and can change its format to use semicolons for separation instead of spaces, you can do that and skip the string() line (probably speeding up your CMake processing a little bit by this).
make clean with implicit rules in makefile
hen I do make clean it complains about missing files. In particular it complains about mapnameserver.hthat is included in nstest.cc and nstime.cc. I thought that doing make clean would ignore all other targets, even implicit ones. What I want is to be able to do make clean and make vectornameserver without make complaining about the headers that nstest.cc and nstime.cc includes that I have not yet written. Is this possible? Below is the files in the src dir nameserverinterface.h nstest.cc nstime.cc vectornameserver.cc vectornameserver.h And this is the Makefile # # Makefile for CPP # # Compiler and compiler options: CC = /usr/local/bin/clang++ CXX = /usr/local/bin/clang++ CXXFLAGS = -c -pipe -O2 -Wall -W -ansi -pedantic-errors CXXFLAGS += -Wmissing-braces -Wparentheses -Wold-style-cast CXXFLAGS += -std=c++11 -stdlib=libc++ -nostdinc++ CXXFLAGS += -I/Users/einar/devel/libcxx/include/ LDFLAGS = -stdlib=libc++ LDLIBS = -L/Users/einar/devel/libcxx/lib/ SRCDIR = ../src LIBDIR = ../lib BINDIR = ../bin DEPDIR = ../dep VPATH = $(SRCDIR):$(LIBDIR):$(BINDIR):$(DEPDIR) LIB_INSTALL = BIN_INSTALL = SRC = $(wildcard $(SRCDIR)/*.cc) OBJ = $(notdir $(SRC:.cc=.o)) DEP = $(addprefix $(DEPDIR)/, $(notdir $(SRC:.cc=.d))) PROGS = vectornameserver MAKEDEPEND = $(CXX) -MM $(CPPFLAGS) -o $*.d $< CP = /bin/cp ### # # Phony targets # ### .PHONY: all all: $(PROGS) .PHONY: folder_setup folder_setup: mkdir -p $(SRCDIR) mkdir -p $(LIBDIR) mkdir -p $(BINDIR) mkdir -p $(DEPDIR) .PHONY: clean clean: #$(RM) $(OBJ) .PHONY: cleaner cleaner: #$(RM) $(OBJ) #$(RM) $(PROGS) #$(RM) $(DEP) #$(RM) $(wildcard $(DEPDIR)/*.d*) ### # # Set up targets for program files in this section # a rule should look like: # program: obj1.o obj2.o ... # ### vectornameserver : vectornameserver.o ### # # In this section automatic dependencies are handled. # ### $(addprefix $(DEPDIR)/, %.d): %.cc #set -e; rm -f $#; \ $(CXX) -MM $(CPPFLAGS) $< > $#.$$$$; \ sed 's,\($*\)\.o[ :]*,\1.o $#: ,g' < $#.$$$$ \ > $#; rm -f $#.$$$$ ### # # Include the automatically generated dependency files # ### include $(DEP) Thanks in advance.
The problem is that you have an include directive in the makefile. This implicitly makes all the included dependency files implicit targets that must be refreshed BEFORE the primary target can be run. It is those rules that are running the compiler and giving you the errors. Since generally you don't want/need the dependency files if you're just doing a make clean, the usual thing is to wrap appropriate ifs around the include: ifneq ($(MAKECMDGOALS),clean) ifneq ($(MAKECMDGOALS),cleaner) -include $(DEP) endif endif This will avoid trying to include the depfiles (and thus regenerate them) if you do make clean or make cleaner. In addition, the - prefix on the include supresses warnings about the depfiles not existing when you first run make (it will (re)generate them and reread the makefile and depfiles if need be.)
linking .dylib via LDFLAGS using clang/LLVM
I am getting an error. One of the source files references: #include <libxml/parser.h> I am working with a Makefile below, trying to link: LDFLAGS =-l../../usr/local/sys/usr/lib/libxml2.dylib Path appears to be correct, and the file is there. Error details from IDE: http://clip2net.com/clip/m0/1333837472-clip-29kb.png http://clip2net.com/clip/m0/1333837744-clip-32kb.png What am I doing wrong? ############################################################################# # Makefile for iPhone application (X) ############################################################################# # Define here the name of your project's main executable, and the name of the # build directory where the generated binaries and resources will go. NAME = X OUTDIR = X.app # Define here the minimal iOS version's MAJOR number (iOS3, iOS4 or iOS5) IOSMINVER = 5 # List here your project's resource files. They can be files or directories. RES = Info.plist icon.png # Define here the compile options and the linker options for your project. CFLAGS = -W -Wall -O2 -Icocos2dx/include -Icocos2dx/platform -Icocos2dx/platform/ios -Icocos2dx/effects -Icocos2dx/cocoa -Icocos2dx/support -Icocos2dx/support/image_support -Icocos2dx/support/data_support -Icocos2dx/support/zip_support -Icocos2dx/extensions -Icocos2dx LDFLAGS =-l../../usr/local/sys/usr/lib/libxml2.2.dylib ############################################################################# # Except for specific projects, you shouldn't need to change anything below ############################################################################# # Define which compiler to use and what are the mandatory compiler and linker # options to build stuff for iOS. Here, use the ARM cross-compiler for iOS, # define IPHONE globally and link against all available frameworks. CC = clang LD = link CFLAGS += -ccc-host-triple arm-apple-darwin -march=armv6 --sysroot ../../usr/local/sys -integrated-as -fdiagnostics-format=msvc -fconstant-cfstrings -DIPHONE -D__IPHONE_OS_VERSION_MIN_REQUIRED=$(IOSMINVER)0000 LDFLAGS += -lstdc++ $(addprefix -framework , $(notdir $(basename $(wildcard /Frameworks/iOS$(IOSMINVER)/*)))) # List here your source files. The current rule means: ask the shell to build # a one-liner list of all files in the current directory and its subdirectories # ending with either .c, .cc, .cpp, .cxx, .m, .mm, .mx or .mxx. SRC = $(shell find . \( -name "*.c" -o -name "*.cc" -o -name "*.cpp" -o -name "*.cxx" -o -name "*.m" -o -name "*.mm" -o -name "*.mx" -o -name "*.mxx" \) -printf '%p ') # Define where the object files should go - currently, just aside the source # files themselves. We take the source file's basename and just append .o. OBJ = $(addsuffix .o, $(basename $(SRC))) ################### # Rules definitions # This rule is the default rule that is called when you type "make". It runs # the specified other rules in that order: removing generated output from # previous builds, compiling all source files into object files, linking them # all together, codesigning the generated file, copying resources in place # and then displaying a success message. all: prune $(OBJ) link codesign resources checksum ipa deb end # The following rule removes the generated output from any previous builds prune: #echo " + Pruning compilation results..." #rm -f $(OUTDIR)/$(NAME) # The following rules compile any .c/.cc/.cpp/.cxx/.m/.mm/.mx/.mxx file it # finds in object files (.o). This is to handle source files in different # languages: C/C++ (with .c* extension), and Objective-C (.m*). %.o: %.c #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< %.o: %.cc #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< %.o: %.cpp #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< %.o: %.cxx #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< %.o: %.m #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< %.o: %.mm #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< %.o: %.mx #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< %.o: %.mxx #echo " + Compiling $<..."; $(CC) $(CFLAGS) -o $# -c $< # The following rule first ensures the output directory exists, creates it if # necessary, then links the compiled .o files together in that directory link: #echo " + Linking project files..." #test -d $(OUTDIR) || mkdir -p $(OUTDIR) #$(LD) $(LDFLAGS) -o $(OUTDIR)/$(NAME) $(OBJ) # The following rule calls Saurik's ldid code pseudo-signing tool to generate # the SHA checksums needed for the generated binary to run on jailbroken iOS. codesign: #echo " + Pseudo-signing code..." #ldid -S $(OUTDIR)/$(NAME) #rm -f $(OUTDIR)/.$(NAME).cs # The following rule takes all the specified resource items one after the # other (whether they are files or directories) ; files are copied in place # and directories are recursively copied only if they don't exist already. resources: #echo " + Copying resources..." #for item in $(RES); do \ if [ -d $$item ]; then test -d $(OUTDIR)/$$item || cp -r $$item $(OUTDIR)/; chmod +r $(OUTDIR)/$$item; \ else cp $$item $(OUTDIR)/; chmod +r $(OUTDIR)/$$item; \ fi; \ done #chmod +x $(OUTDIR) #chmod -R +r $(OUTDIR) #chmod +x $(OUTDIR)/$(NAME) # The following rule takes all files in the target directory and builds the # _CodeSignature/CodeResource XML file with their SHA1 hashes. checksum: #echo " + Generating _CodeSignature directory..." #echo -n APPL???? > $(OUTDIR)/PkgInfo #codesigner $(OUTDIR) > .CodeResources.$(NAME) #test -d $(OUTDIR)/_CodeSignature || mkdir -p $(OUTDIR)/_CodeSignature #mv .CodeResources.$(NAME) $(OUTDIR)/_CodeSignature/CodeResources #test -L $(OUTDIR)/CodeResources || ln -s _CodeSignature/CodeResources $(OUTDIR)/CodeResources # The following rule builds an IPA file out of the compiled app directory. ipa: #echo " + Building iTunes package..." #test -d Packages || mkdir Packages #rm -f Packages/$(NAME).ipa #test -d Payload || mkdir Payload #mv -f $(OUTDIR) Payload #cp -f iTunesArtwork.jpg iTunesArtwork #chmod +r iTunesArtwork #zip -y -r Packages/$(NAME).ipa Payload iTunesArtwork -x \*.log \*.lastbuildstate \*successfulbuild > /dev/null #rm -f iTunesArtwork #mv -f Payload/$(OUTDIR) . #rmdir Payload # The following rule builds a Cydia package out of the compiled app directory. deb: #echo " + Building Cydia package..." #test -d Packages || mkdir Packages #rm -f Packages/$(NAME).deb #test -d $(NAME) || mkdir $(NAME) #test -d $(NAME)/Applications || mkdir $(NAME)/Applications #mv -f $(OUTDIR) $(NAME)/Applications #test -d $(NAME)/DEBIAN || mkdir $(NAME)/DEBIAN #cp -f cydia-package.cfg $(NAME)/DEBIAN/control #chmod +r $(NAME)/DEBIAN/control #echo "#!/bin/bash" > $(NAME)/DEBIAN/postinst #echo "rm -f /Applications/$(OUTDIR)/*.log /Applications/$(OUTDIR)/*.lastbuildstate /Applications/$(OUTDIR)/*.successfulbuild" >> $(NAME)/DEBIAN/postinst #echo "chown -R root:admin \"/Applications/$(OUTDIR)\"" >> $(NAME)/DEBIAN/postinst #echo "find \"/Applications/$(OUTDIR)\"|while read ITEM; do if [ -d \"\$$ITEM\" ]; then chmod 755 \"\$$ITEM\"; else chmod 644 \"\$$ITEM\"; fi; done" >> $(NAME)/DEBIAN/postinst #echo "chmod +x \"/Applications/$(OUTDIR)/$(NAME)\"" >> $(NAME)/DEBIAN/postinst #echo "su -c /usr/bin/uicache mobile 2> /dev/null" >> $(NAME)/DEBIAN/postinst #echo "exit 0" >> $(NAME)/DEBIAN/postinst #chmod +r+x $(NAME)/DEBIAN/postinst #dpkg-deb -b $(NAME) > /dev/null 2>&1 #mv -f $(NAME).deb Packages #mv -f $(NAME)/Applications/$(OUTDIR) . #rm -rf $(NAME) # This simple rule displays the success message after a successful build end: #echo " + Done. Output directory is \"$(OUTDIR)\", iTunes package is \"Packages\$(NAME).ipa\", Cydia package is \"Packages\$(NAME).deb\"." # This rule removes generated object files from the project and also temporary # files ending with ~ or #. clean: #echo " + Cleaning project intermediate files..." #rm -f $(OBJ) *~ *\# #echo " + Done." # This rule removes all generated output from any previous builds so as to # leave an intact source tree (useful for generating source tree releases). distclean: clean #echo " + Cleaning project output files..." #rm -rf $(OUTDIR) #echo " + Done."
You actually may have two problems. I suggest you try: Add -I../../usr/local/sys/usr/include to your CFLAGS to make it find the header. Change the LDFLAGS to -L../../usr/local/sys/usr/lib, add LIBS=-lxml2 and change the linker invocation to $(LD) $(LDFLAGS) -o $(OUTDIR)/$(NAME) $(OBJ) $(LIBS) (i.e. add the -l at the end, the -L at the beginning of the linker command line).
-l is for specifying the library name only. Use -L to add directories where libraries will also be looked for: LDFLAGS += -L../../usr/local/sys/usr/lib -lxml2 Hope this helps.