Exiting from a Makefile based on the state of two shell variables - if-statement

Question

During make checksource, $CROSS_COMPILE should be "whatever". If $CROSS_COMPILE is not set, make should throw an error and exit.
I have the following rule in my Makefile:
.PHONY: checksource
all: checksource default
checksource:
$(if $(and $(ifeq ($(CROSS_COMPILE), whatever)), $(ifeq ($(VARIABLE),))), \
($(shell echo "Error! VARIABLE not defined!") \
$(shell exit 2)))
Right now if $CROSS_COMPILE is set to whatever and $VARIABLE is undefined, the make doesn't exit.
$CROSS_COMPILE:
$> echo $CROSS_COMPILE
whatever
$>
$VARIABLE is not defined:
$> echo $VARIABLE
$>
I could use a nested ifeq, but I want to make it pretty (and learn a bit more about Makefile operations).

Answer 1

There is no such thing as $(ifeq). I still think you should do the check in the makefile itself, not as one of the targets:
ifeq ($(CROSS_COMPILE),whatever)
ifeq ($(VARIABLE),)
$(error Variables not set correctly.)
endif
endif
And if you're set on avoiding nested ifeq:
ifeq ($(or $(subst whatever,,$(CROSS_COMPILE)),$(VARIABLE)),)
$(error Variables not set correctly.)
endif
But I fail to see how that's an improvement. If you want to do it in a target, just use the shell and don't bother with make functions:
checksource:
#if [ "$(CROSS_COMPILE)" = whatever -a -z "$(VARIABLE)" ]; then \
echo "Error: Variables not set correctly"; exit 2; \
else true; fi
I'd still go with the first option, because you can stop make before it stat s all the files names in Makefile and decides to start executing checksource.

Answer 2

Doing it in make is always better than using the shell (whether via $(shell) or a recipe). If you do do the check in a recipe, then it means that the Makefile can contain other targets that do not need this particular assert.
assert = $(if $(filter whatever,${CROSS_COMPILE}),$(if ${VARIABLE},,$(error Urk! Variable problem)))
checksource:
${assert}some shell commands...
P.S. If you ran your original make with --warn-undefined-variables you may have got some clue why your macros were not expanding properly:
$ make -f 1.mak CROSS_COMPILE=whatever --warn-undefined-variables
1.mak:6: warning: undefined variable `ifeq (whatever, whatever)'
make: *** No rule to make target `default', needed by `all'. Stop.