Why is my makefile not generating the .exe? - c++

I've started to code on Visual Studio Code (I was coding on IDE before) and to make project I learned that you need to do a makefile to link the file in your project.
So i searched a lot of tuto and i come up with this:
DEBUG=yes
CXX=g++
ifeq ($(DEBUG),yes)
CXXFLAGS=-W -Wall -ansi -pedantic -g
LDFLAGS=
else
CXXFLAGS=-W -Wall -ansi -pedantic
LDFLAGS=
endif
OBJDIR:= obj
EXECDIR:= bin
VPATH=src
EXEC=$(VPATH)/prog
SRC= $(wildcard src/*.cpp)
OBJECTS= main.o hello.o
OBJ= $(addprefix $(OBJDIR)/,$(OBJECTS))
all : $(EXEC)
ifeq ($(DEBUG),yes)
#echo "Generation en mode debug"
else
#echo "Generation en mode release"
endif
$(EXECDIR)/$(EXEC): $(OBJ) | $(EXECDIR)
$(CXX) $(CXXFLAGS) -o $# $^
$(EXECDIR):
mkdir $(EXECDIR)
$(OBJDIR)/main.o: src/hello.hpp
$(OBJDIR)/hello.o: src/hello.hpp
$(OBJDIR)/%.o: src/%.cpp | $(OBJDIR)
#$(CXX) -o $# -c $< $(CXXFLAGS)
$(OBJDIR):
mkdir $(OBJDIR)
.PHONY: clean mrproper
clean:
#rm -rf *.o
mrproper: clean
#rm -rf $(EXEC)
but I have a little problem ...
xe: cannot open output file /prog.exe: Permission denied
collect2.exe: error: ld returned 1 exit status
mingw32-make: *** [makefile:26: /prog] Error 1
And i really don't know why it is doing this

Related

/usr/bin/ld: cannot open output file bin/genericMatching: No such file or directory

I'm trying to compile my c++ program using makefile in ubuntu But there is an error which I can't understand. This is an error message I got.
Parallel/ParallelSlave.o Parallel/IOHandler.o commons/File19794.o -o bin/genericMatching
/usr/bin/ld: cannot open output file bin/genericMatching: No such file or directory
collect2: error: ld returned 1 exit status
Makefile:38: recipe for target 'bin/genericMatching' failed
This is codes inside my Makefile and there is no bin file/directory in my program folder :
# The compiler to use.
CC = mpiCC
# Directories for Includes and Common clases
IDIR =include
CDIR =commons/
JIANGDIR =MatcherJiang/
MCCDIR =MCC/
PDIR =Parallel/
BINDIR =bin/
# Compiler options -Weffc++
CFLAGS= -Wall -O2 -fopenmp -I$(IDIR) -I$(JIANGDIR) -I$(MCCDIR)
# Sources and Common clases sources
SOURCES= $(PDIR)genericMatching.cpp
SOURCESD= $(PDIR)DPDDFF.cpp
CSOURCES= $(CDIR)Fingerprint.cpp $(CDIR)Score.cpp $(JIANGDIR)FingerprintJiang.cpp $(MCCDIR)MCC.cpp $(MCCDIR)Cylinder.cpp $(CDIR)Functions.cpp $(CDIR)Minutia.cpp $(CDIR)GrahamScanConvexHull.cpp $(CDIR)Munkres.cpp $(PDIR)ParallelHandler.cpp $(PDIR)ParallelMaster.cpp $(PDIR)ParallelSlave.cpp $(PDIR)IOHandler.cpp $(CDIR)File19794.cpp
# Objects
OBJECTS=$(SOURCES:.cpp=.o)
OBJECTSD=$(SOURCESD:.cpp=.o)
COBJECTS=$(CSOURCES:.cpp=.o)
# Name of the executable
EXECUTABLE=$(BINDIR)genericMatching
EXECUTABLED=$(BINDIR)DPDDFF
all: $(EXECUTABLE) $(EXECUTABLED)
.PHONY: doc
doc:
doxygen Doxyfile
$(EXECUTABLE): $(OBJECTS) $(COBJECTS)
$(CC) $(CFLAGS) $(OBJECTS) $(COBJECTS) $(OBJECTFILES) -o $# $(LDFLAGS)
$(EXECUTABLED): $(OBJECTSD) $(COBJECTS)
$(CC) $(CFLAGS) $(OBJECTSD) $(COBJECTS) $(OBJECTFILES) -o $# $(LDFLAGS)
.cpp.o:
$(CC) $(CFLAGS) -c $< -o $#
clean:
rm -f $(OBJECTS) $(OBJECTSD) $(COBJECTS) $(EXECUTABLE) $(EXECUTABLED)
mrproper: clean
rm -r doc/latex doc/html
When running this rule:
$(EXECUTABLE): $(OBJECTS) $(COBJECTS)
$(CC) $(CFLAGS) $(OBJECTS) $(COBJECTS) $(OBJECTFILES) -o $# $(LDFLAGS)
it will implicitly run ld to create $(EXECUTABLE), which is bin/genericMatching. Because the bin directory does not exist, throws an error. I would suggest adding:
$(EXECUTABLE) $(EXECUTABLED): | $(BIN)
$(BIN) :
mkdir -p $#
to your makefile. Make will generate the directory before building the executables. Notice that the | makes it an order-only prerequisite, which means it will not rebuild $(EXECUTABLE) or $(EXECUTABLED) if $(BIN) is newer than either target.

Makefile: How to build with debug symbols?

Project structure:
Makefile
/src
/include
I have the following Makefile for a C++ project. It builds fine but I can't seem to be able to build the debug files with the -g flag.
Here's the Makefile:
NAME := MySuperProgram
BDIR := bin
ODIR := obj
SRC := $(wildcard src/*.cpp)
OBJ := $(SRC:src/%.cpp=$(ODIR)/%.o)
CXXFLAGS := -W -Wall -Werror
.PHONY: all debug clean fclean re
all: $(NAME)
debug: CXXFLAGS += -DDEBUG -g
debug:all
$(NAME): $(OBJ) | $(BDIR)
$(CXX) $(CXXFLAGS) $^ -o $(BDIR)/$#
$(ODIR)/%.o: src/%.cpp | $(ODIR)
$(CXX) $(CXXFLAGS) -c -o $# $<
$(ODIR) $(BDIR):
#mkdir -p $#
clean:
$(RM) -r $(ODIR)
fclean: clean
$(RM) -r $(BDIR)
re: fclean all
Environment:
Debian 8
GCC 4.9.2
I have read How can I configure my makefile for debug and release builds? but it's not helping on this particular case.
How to make it build with debug symbols in the $(BDIR) ?

Compiling Error /usr/bin/ld: cannot open output file bin/server: No such file or directory

I'm trying to compile my program C using makefile in ubuntu. But I dont know whats the problem in it. And there is an error which I can't fix.
gcc -Wall -I. -pthread -ggdb -g -O0 -o bin/server server/message_queue.o server/client_thread.o server/server.o server/file.o server/datatypes.o common/datatypes.o common/error.o common/socket.o
/usr/bin/ld: cannot open output file bin/server: No such file or directory
collect2: error: ld returned 1 exit status
make: *** [bin/server] Error 1
here is a makefile:
CC=gcc
CFLAGS=-Wall -I. -pthread -ggdb -g -O0
SERVER_OBJ=\
server/message_queue.o \
server/client_thread.o \
server/server.o \
server/file.o \
server/datatypes.o
COMMON_OBJ=\
common/datatypes.o \
common/error.o \
common/socket.o
CLIENT_OBJ=\
client/send_thread.o \
client/recv_thread.o \
client/terminal_thread.o \
client/client.o \
client/datatypes.o
BIN=bin
all: server client
server: $(BIN)/server
client: $(BIN)/client
$(BIN)/server: $(SERVER_OBJ) $(COMMON_OBJ)
$(CC) $(CFLAGS) $(SERVER_CFLAGS) -o $# $^
$(BIN)/client: $(CLIENT_OBJ) $(COMMON_OBJ)
$(CC) $(CFLAGS) $(CLIENT_CFLAGS) -o $# $^
%.o: %.c
$(CC) $(CFLAGS) -c -o $# $^
clean:
rm -f server
May be I forgot to install somthing for linux?
Your problem is simple: you do not check if the directory bin exists before linking your executables. Also, your makefile is a little bit messy. That one should do what you want:
BIN := bin
CLIENT := $(BIN)/client
SERVER := $(BIN)/server
COMMON_SRC := $(wildcard common/*.c)
COMMON_OBJ := $(COMMON_SRC:.c=.o)
CLIENT_SRC := $(wildcard client/*.c)
CLIENT_OBJ := $(CLIENT_SRC:.c=.o)
SERVER_SRC := $(wildcard server/*.c)
SERVER_OBJ := $(SERVER_SRC:.c=.o)
CPPFLAGS := -I. -pthread
CFLAGS := -Wall -ggdb -g -O0
LDFLAGS := -pthread
.PHONY: all client server clean fclean
all: client server
client: $(CLIENT)
server: $(SERVER)
$(CLIENT): $(COMMON_OBJ) $(CLIENT_OBJ) | $(BIN)
$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $#
$(SERVER): $(COMMON_OBJ) $(SERVER_OBJ) | $(BIN)
$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $#
$(BIN):
mkdir $#
clean:
#$(RM) -rv $(BIN) $(COMMON_OBJ) $(CLIENT_OBJ) $(SERVER_OBJ)

make error as: unrecognized option '-mcpu=arm1176jzf-s'

I am trying to compile some C to run on a friendlyARM for days now without any luck, i think im close but getting this error:
kevin#kevin-VirtualBox:~/Desktop/makef$ make
arm-none-linux-gnueabi-gcc -c -o obj/main.o main.c -I./
as: unrecognized option '-mcpu=arm1176jzf-s'
make: *** [obj/main.o] Error 1
Does anyone know how to what this error means and how to fix it?
steps i have tried:
1
touch *.*
make clean
make
(error as: unrecognized option '-mcpu=arm1176jzf-s)
2
touch *.*
make clean
make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi-l
(error as: unrecognized option '-mcpu=arm1176jzf-s)
the Makefile :
IDIR =./
CC=arm-none-linux-gnueabi-gcc
CFLAGS=-I$(IDIR)
ODIR=obj
LDIR =./
LIBS=-lgd -lrt
_DEPS = main.h Makefile
DEPS = $(patsubst %,$(IDIR)/%,$(_DEPS))
_OBJ = main.o serial.o fb.o menu_main.o timer.o cmdin.o buzzer.o statemachine.o inout.o network.o text_file_input.o text_file_input_oven.o
OBJ = $(patsubst %,$(ODIR)/%,$(_OBJ))
$(ODIR)/%.o: %.c $(DEPS)
$(CC) -c -o $# $< $(CFLAGS)
main: $(OBJ)
$(CC) -o $# $^ $(CFLAGS) $(LIBS)
.PHONY: clean
clean:
rm -f $(ODIR)/*.o *~ core $(INCDIR)/*~
It means the version of gcc that you have installed does not understand the option -mcpu=arm1176jzf-s
Either you have an older version of gcc which does not accept that option, or you have a version of gcc that has cross compiling support turned off.

Help with Makefile: No rule to make target

CC = g++
CFLAGS = -Wall
RM = /bin/rm -rf
BIN_DIR =
ifeq "$(DEBUG)" "1"
BIN_DIR = Debug
else
BIN_DIR = Release
endif
OBJS = \
$(BIN_DIR)/Unit.o
$(BIN_DIR)/%.o: src/%.c
#echo Building "$#"
#g++ -c "$<" -o"$#"
all: $(OBJS)
clean:
$(RM) $(BIN_DIR)
.PHONY: all clean
However, when I try to build my project this, it gives me the error:
make: *** No rule to make target 'Release/Unit.o', needed by 'all'. Stop.
I am new to writing makefiles from scratch and so this might be a stupid question, but any help is appreciated!
The problem is here:
$(BIN_DIR)/%.o: src/%.c
#echo Building "$#"
#g++ -c "#<" -o"$#"
I think that's more like this :
$(BIN_DIR)%.o: %.c
$(CC) -o $# -c $< $(CFLAGS)
As Sean Bright already pointed out, changing
#g++ -c "#<" -o"$#"
to
#g++ -c "$<" -o"$#"
also makes the Makefile work for me (ming32-make: GNU Make 3.81)
Since you had the Makefile on the same level as the source file (inside the src directory), your rule were failing.